[compiler] Only spill SIMD reg if valid
The allocatable registers have holes, so not all FP registers are one half of a valid SIMD register. Thus check if {GetAliases} returned an allocatable SIMD register before looking up if that register is being used. Otherwise we run into a DCHECK because {simd_reg} is invalid. The bug was only introduced recently: https://crrev.com/c/3404780 R=thibaudm@chromium.org Bug: chromium:1290079, v8:12330 Change-Id: I99df1645cfeec375daec82dbf41c110b5474339c Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3412075 Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/main@{#78742}
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@ -1905,8 +1905,9 @@ void SinglePassRegisterAllocator::SpillRegisterAtMerge(
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(rep == MachineRepresentation::kFloat64 ? 1 : 2));
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RegisterIndex simd_reg =
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FromRegCode(simd_reg_code, MachineRepresentation::kSimd128);
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DCHECK(simd_reg == reg || simdSibling(simd_reg) == reg);
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if (reg_state->IsAllocated(simd_reg)) {
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DCHECK(!simd_reg.is_valid() || simd_reg == reg ||
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simdSibling(simd_reg) == reg);
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if (simd_reg.is_valid() && reg_state->IsAllocated(simd_reg)) {
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int virtual_register = reg_state->VirtualRegisterForRegister(simd_reg);
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VirtualRegisterData& vreg_data =
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data_->VirtualRegisterDataFor(virtual_register);
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@ -1549,6 +1549,7 @@
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'regress/wasm/regress-1286253': [SKIP],
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'regress/wasm/regress-1283395': [SKIP],
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'regress/wasm/regress-1289678': [SKIP],
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'regress/wasm/regress-1290079': [SKIP],
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}], # no_simd_hardware == True
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##############################################################################
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47
test/mjsunit/regress/wasm/regress-1290079.js
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47
test/mjsunit/regress/wasm/regress-1290079.js
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@ -0,0 +1,47 @@
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// Copyright 2022 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// Flags: --no-liftoff --turbo-force-mid-tier-regalloc
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d8.file.execute('test/mjsunit/wasm/wasm-module-builder.js');
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const builder = new WasmModuleBuilder();
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builder.addFunction(undefined, makeSig([], [kWasmS128]))
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.addBody([
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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kExprI32Const, 0x00, // i32.const
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kSimdPrefix, kExprI8x16ReplaceLane, 0x00, // i8x16.replace_lane
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kSimdPrefix, kExprI8x16GtS, // i8x16.gt_s
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kSimdPrefix, kExprI16x8Ne, // i16x8.ne
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...wasmS128Const(new Array(16).fill(1)), // s128.const
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kExprI32Const, 0x00, // i32.const
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kSimdPrefix, kExprI8x16ReplaceLane, 0x00, // i8x16.replace_lane
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kExprI32Const, 0x00, // i32.const
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kSimdPrefix, kExprI8x16ReplaceLane, 0x00, // i8x16.replace_lane
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...wasmS128Const(new Array(16).fill(2)), // s128.const
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kSimdPrefix, kExprI16x8Eq, // i16x8.eq
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kSimdPrefix, kExprI16x8Ne, // i16x8.ne
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...wasmS128Const(new Array(16).fill(1)), // s128.const
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...wasmS128Const(new Array(16).fill(1)), // s128.const
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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kSimdPrefix, kExprI16x8AddSatU, 0x01, // i16x8.add_sat_u
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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kSimdPrefix, kExprI16x8Sub, 0x01, // i16x8.sub
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kSimdPrefix, kExprI64x2ExtMulHighI32x4U, 0x01, // i64x2.extmul_high_i32x4_u
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kSimdPrefix, kExprI64x2ExtMulLowI32x4S, 0x01, // i64x2.extmul_low_i32x4_s
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kExprF32Const, 0x00, 0x00, 0x00, 0x00, // f32.const
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kExprF32Const, 0x00, 0x00, 0x00, 0x00, // f32.const
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kExprF32Mul, // f32.mul
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kExprF32Const, 0x00, 0x00, 0x00, 0x00, // f32.const
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...wasmS128Const(new Array(16).fill(0)), // s128.const
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kSimdPrefix, kExprI16x8ExtractLaneS, 0x00, // i16x8.extract_lane_s
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kExprSelect, // select
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kNumericPrefix, kExprI32SConvertSatF32, // i32.trunc_sat_f32_s
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kSimdPrefix, kExprI8x16ReplaceLane, 0x00, // i8x16.replace_lane
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kSimdPrefix, kExprI16x8Ne, // i16x8.ne
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]);
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builder.toModule();
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