X64: A bunch of small fixes.

Make push/pop use emit_optional_rex32.
Fix bug in disassembler (swapped name of comisd/ucomisd).
Use fstp in FCmp macro.

Review URL: http://codereview.chromium.org/2818026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4928 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
lrn@chromium.org 2010-06-23 11:48:30 +00:00
parent 132fea7980
commit a2fc244de2
5 changed files with 28 additions and 31 deletions

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@ -376,8 +376,13 @@ void Assembler::GetCode(CodeDesc* desc) {
void Assembler::Align(int m) {
ASSERT(IsPowerOf2(m));
while ((pc_offset() & (m - 1)) != 0) {
nop();
int delta = (m - (pc_offset() & (m - 1))) & (m - 1);
while (delta >= 9) {
nop(9);
delta -= 9;
}
if (delta > 0) {
nop(delta);
}
}
@ -837,9 +842,7 @@ void Assembler::call(Register adr) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
// Opcode: FF /2 r64.
if (adr.high_bit()) {
emit_rex_64(adr);
}
emit_optional_rex_32(adr);
emit(0xFF);
emit_modrm(0x2, adr);
}
@ -849,9 +852,9 @@ void Assembler::call(const Operand& op) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
// Opcode: FF /2 m64.
emit_rex_64(op);
emit_optional_rex_32(op);
emit(0xFF);
emit_operand(2, op);
emit_operand(0x2, op);
}
@ -1270,9 +1273,7 @@ void Assembler::jmp(Register target) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
// Opcode FF/4 r64.
if (target.high_bit()) {
emit_rex_64(target);
}
emit_optional_rex_32(target);
emit(0xFF);
emit_modrm(0x4, target);
}
@ -1831,9 +1832,7 @@ void Assembler::nop(int n) {
void Assembler::pop(Register dst) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
if (dst.high_bit()) {
emit_rex_64(dst);
}
emit_optional_rex_32(dst);
emit(0x58 | dst.low_bits());
}
@ -1841,7 +1840,7 @@ void Assembler::pop(Register dst) {
void Assembler::pop(const Operand& dst) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
emit_rex_64(dst); // Could be omitted in some cases.
emit_optional_rex_32(dst);
emit(0x8F);
emit_operand(0, dst);
}
@ -1857,9 +1856,7 @@ void Assembler::popfq() {
void Assembler::push(Register src) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
if (src.high_bit()) {
emit_rex_64(src);
}
emit_optional_rex_32(src);
emit(0x50 | src.low_bits());
}
@ -1867,7 +1864,7 @@ void Assembler::push(Register src) {
void Assembler::push(const Operand& src) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
emit_rex_64(src); // Could be omitted in some cases.
emit_optional_rex_32(src);
emit(0xFF);
emit_operand(6, src);
}

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@ -46,23 +46,23 @@ namespace internal {
// Test whether a 64-bit value is in a specific range.
static inline bool is_uint32(int64_t x) {
static const int64_t kUInt32Mask = V8_INT64_C(0xffffffff);
return x == (x & kUInt32Mask);
static const uint64_t kMaxUInt32 = V8_UINT64_C(0xffffffff);
return static_cast<uint64_t>(x) <= kMaxUInt32;
}
static inline bool is_int32(int64_t x) {
static const int64_t kMinIntValue = V8_INT64_C(-0x80000000);
return is_uint32(x - kMinIntValue);
static const int64_t kMinInt32 = -V8_INT64_C(0x80000000);
return is_uint32(x - kMinInt32);
}
static inline bool uint_is_int32(uint64_t x) {
static const uint64_t kMaxIntValue = V8_UINT64_C(0x80000000);
return x < kMaxIntValue;
static const uint64_t kMaxInt32 = V8_UINT64_C(0x7fffffff);
return x <= kMaxInt32;
}
static inline bool is_uint32(uint64_t x) {
static const uint64_t kMaxUIntValue = V8_UINT64_C(0x100000000);
return x < kMaxUIntValue;
static const uint64_t kMaxUInt32 = V8_UINT64_C(0xffffffff);
return x <= kMaxUInt32;
}
// CPU Registers.

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@ -1028,9 +1028,9 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
if (opcode == 0x57) {
mnemonic = "xorpd";
} else if (opcode == 0x2E) {
mnemonic = "comisd";
} else if (opcode == 0x2F) {
mnemonic = "ucomisd";
} else if (opcode == 0x2F) {
mnemonic = "comisd";
} else {
UnimplementedInstruction();
}

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@ -1678,8 +1678,7 @@ void MacroAssembler::Ret() {
void MacroAssembler::FCmp() {
fucomip();
ffree(0);
fincstp();
fstp(0);
}

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@ -546,7 +546,8 @@ class MacroAssembler: public Assembler {
Register map,
Register instance_type);
// FCmp is similar to integer cmp, but requires unsigned
// FCmp compares and pops the two values on top of the FPU stack.
// The flag results are similar to integer cmp, but requires unsigned
// jcc instructions (je, ja, jae, jb, jbe, je, and jz).
void FCmp();