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[turbofan] Re-enables the jump table emission in the mips instruction selector.

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Changes MacroAssembler::GenerateSwitchTable to make sure that 'ra' is properly restored.

BUG=

Review URL: https://codereview.chromium.org/1761863002

Cr-Commit-Position: refs/heads/master@{#34460}
This commit is contained in:
epertoso 2016-03-03 06:38:21 -08:00 committed by Commit bot
parent 2689548e38
commit a3a583dbaa
4 changed files with 40 additions and 44 deletions
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36
src/compiler/mips/instruction-selector-mips.cc
View File

@ -1216,27 +1216,23 @@ void InstructionSelector::VisitSwitch(Node* node, const SwitchInfo& sw) {
MipsOperandGenerator g(this);
InstructionOperand value_operand = g.UseRegister(node->InputAt(0));
// TODO(mips): TableSwitch is broken, as it messes with ra without saving it
// properly (which breaks with frame elision, i.e. inside stubs).
if (false) {
// Emit either ArchTableSwitch or ArchLookupSwitch.
size_t table_space_cost = 9 + sw.value_range;
size_t table_time_cost = 3;
size_t lookup_space_cost = 2 + 2 * sw.case_count;
size_t lookup_time_cost = sw.case_count;
if (sw.case_count > 0 &&
table_space_cost + 3 * table_time_cost <=
lookup_space_cost + 3 * lookup_time_cost &&
sw.min_value > std::numeric_limits<int32_t>::min()) {
InstructionOperand index_operand = value_operand;
if (sw.min_value) {
index_operand = g.TempRegister();
Emit(kMipsSub, index_operand, value_operand,
g.TempImmediate(sw.min_value));
}
// Generate a table lookup.
return EmitTableSwitch(sw, index_operand);
// Emit either ArchTableSwitch or ArchLookupSwitch.
size_t table_space_cost = 9 + sw.value_range;
size_t table_time_cost = 3;
size_t lookup_space_cost = 2 + 2 * sw.case_count;
size_t lookup_time_cost = sw.case_count;
if (sw.case_count > 0 &&
table_space_cost + 3 * table_time_cost <=
lookup_space_cost + 3 * lookup_time_cost &&
sw.min_value > std::numeric_limits<int32_t>::min()) {
InstructionOperand index_operand = value_operand;
if (sw.min_value) {
index_operand = g.TempRegister();
Emit(kMipsSub, index_operand, value_operand,
g.TempImmediate(sw.min_value));
}
// Generate a table lookup.
return EmitTableSwitch(sw, index_operand);
}
// Generate a sequence of conditional jumps.

36
src/compiler/mips64/instruction-selector-mips64.cc
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@ -1711,27 +1711,23 @@ void InstructionSelector::VisitSwitch(Node* node, const SwitchInfo& sw) {
Mips64OperandGenerator g(this);
InstructionOperand value_operand = g.UseRegister(node->InputAt(0));
// TODO(mips): TableSwitch is broken, as it messes with ra without saving it
// properly (which breaks with frame elision, i.e. inside stubs).
if (false) {
// Emit either ArchTableSwitch or ArchLookupSwitch.
size_t table_space_cost = 10 + 2 * sw.value_range;
size_t table_time_cost = 3;
size_t lookup_space_cost = 2 + 2 * sw.case_count;
size_t lookup_time_cost = sw.case_count;
if (sw.case_count > 0 &&
table_space_cost + 3 * table_time_cost <=
lookup_space_cost + 3 * lookup_time_cost &&
sw.min_value > std::numeric_limits<int32_t>::min()) {
InstructionOperand index_operand = value_operand;
if (sw.min_value) {
index_operand = g.TempRegister();
Emit(kMips64Sub, index_operand, value_operand,
g.TempImmediate(sw.min_value));
}
// Generate a table lookup.
return EmitTableSwitch(sw, index_operand);
// Emit either ArchTableSwitch or ArchLookupSwitch.
size_t table_space_cost = 10 + 2 * sw.value_range;
size_t table_time_cost = 3;
size_t lookup_space_cost = 2 + 2 * sw.case_count;
size_t lookup_time_cost = sw.case_count;
if (sw.case_count > 0 &&
table_space_cost + 3 * table_time_cost <=
lookup_space_cost + 3 * lookup_time_cost &&
sw.min_value > std::numeric_limits<int32_t>::min()) {
InstructionOperand index_operand = value_operand;
if (sw.min_value) {
index_operand = g.TempRegister();
Emit(kMips64Sub, index_operand, value_operand,
g.TempImmediate(sw.min_value));
}
// Generate a table lookup.
return EmitTableSwitch(sw, index_operand);
}
// Generate a sequence of conditional jumps.

6
src/mips/macro-assembler-mips.h
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@ -1778,12 +1778,14 @@ void MacroAssembler::GenerateSwitchTable(Register index, size_t case_count,
lw(at, MemOperand(at));
} else {
Label here;
BlockTrampolinePoolFor(case_count + 6);
BlockTrampolinePoolFor(case_count + 10);
push(ra);
bal(&here);
sll(at, index, kPointerSizeLog2); // Branch delay slot.
bind(&here);
addu(at, at, ra);
lw(at, MemOperand(at, 4 * v8::internal::Assembler::kInstrSize));
pop(ra);
lw(at, MemOperand(at, 6 * v8::internal::Assembler::kInstrSize));
}
jr(at);
nop(); // Branch delay slot nop.

6
src/mips64/macro-assembler-mips64.h
View File

@ -1941,13 +1941,15 @@ void MacroAssembler::GenerateSwitchTable(Register index, size_t case_count,
ld(at, MemOperand(at));
} else {
Label here;
BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 7);
BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 11);
Align(8);
push(ra);
bal(&here);
dsll(at, index, kPointerSizeLog2); // Branch delay slot.
bind(&here);
daddu(at, at, ra);
ld(at, MemOperand(at, 4 * v8::internal::Assembler::kInstrSize));
pop(ra);
ld(at, MemOperand(at, 6 * v8::internal::Assembler::kInstrSize));
}
jr(at);
nop(); // Branch delay slot nop.