MIPS64: Fix test Cvt_s_uw_Trunc_uw_s.
The higher word (bits 32 - 63) of FPU register is set on zero before storing result. TEST=cctest/test-macro-assembler-mips64/Cvt_s_uw_Trunc_uw_s BUG= Review URL: https://codereview.chromium.org/1812193003 Cr-Commit-Position: refs/heads/master@{#34889}
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@ -604,6 +604,7 @@ TEST(Cvt_s_uw_Trunc_uw_s) {
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CHECK_EQ(static_cast<float>(input),
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run_Cvt<uint64_t>(input, [](MacroAssembler* masm) {
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__ Cvt_s_uw(f0, a0);
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__ mthc1(zero_reg, f2);
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__ Trunc_uw_s(f2, f0, f1);
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}));
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}
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