Put the icache checks in the ARM simulator behind a flag,
off by default, to speed up debug mode. Review URL: http://codereview.chromium.org/1787006 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4521 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -541,7 +541,6 @@ void Simulator::FlushOnePage(intptr_t start, int size) {
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void Simulator::CheckICache(Instr* instr) {
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#ifdef DEBUG
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intptr_t address = reinterpret_cast<intptr_t>(instr);
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void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
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void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
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@ -560,7 +559,6 @@ void Simulator::CheckICache(Instr* instr) {
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memcpy(cached_line, line, CachePage::kLineLength);
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*cache_valid_byte = CachePage::LINE_VALID;
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}
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#endif
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}
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@ -2441,7 +2439,9 @@ void Simulator::DecodeType6CoprocessorIns(Instr* instr) {
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// Executes the current instruction.
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void Simulator::InstructionDecode(Instr* instr) {
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CheckICache(instr);
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if (v8::internal::FLAG_check_icache) {
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CheckICache(instr);
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}
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pc_modified_ = false;
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if (::v8::internal::FLAG_trace_sim) {
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disasm::NameConverter converter;
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@ -232,6 +232,7 @@ DEFINE_bool(optimize_ast, true, "optimize the ast")
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// simulator-arm.cc and simulator-mips.cc
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DEFINE_bool(trace_sim, false, "Trace simulator execution")
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DEFINE_bool(check_icache, false, "Check icache flushes in ARM simulator")
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DEFINE_int(stop_sim_at, 0, "Simulator stop after x number of instructions")
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DEFINE_int(sim_stack_alignment, 8,
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"Stack alingment in bytes in simulator (4 or 8, 8 is default)")
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