Put the icache checks in the ARM simulator behind a flag,

off by default, to speed up debug mode.
Review URL: http://codereview.chromium.org/1787006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4521 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
erik.corry@gmail.com 2010-04-28 07:15:34 +00:00
parent 6684b3c5d3
commit a63d2bcd8d
2 changed files with 4 additions and 3 deletions

View File

@ -541,7 +541,6 @@ void Simulator::FlushOnePage(intptr_t start, int size) {
void Simulator::CheckICache(Instr* instr) {
#ifdef DEBUG
intptr_t address = reinterpret_cast<intptr_t>(instr);
void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
@ -560,7 +559,6 @@ void Simulator::CheckICache(Instr* instr) {
memcpy(cached_line, line, CachePage::kLineLength);
*cache_valid_byte = CachePage::LINE_VALID;
}
#endif
}
@ -2441,7 +2439,9 @@ void Simulator::DecodeType6CoprocessorIns(Instr* instr) {
// Executes the current instruction.
void Simulator::InstructionDecode(Instr* instr) {
CheckICache(instr);
if (v8::internal::FLAG_check_icache) {
CheckICache(instr);
}
pc_modified_ = false;
if (::v8::internal::FLAG_trace_sim) {
disasm::NameConverter converter;

View File

@ -232,6 +232,7 @@ DEFINE_bool(optimize_ast, true, "optimize the ast")
// simulator-arm.cc and simulator-mips.cc
DEFINE_bool(trace_sim, false, "Trace simulator execution")
DEFINE_bool(check_icache, false, "Check icache flushes in ARM simulator")
DEFINE_int(stop_sim_at, 0, "Simulator stop after x number of instructions")
DEFINE_int(sim_stack_alignment, 8,
"Stack alingment in bytes in simulator (4 or 8, 8 is default)")