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[wasm-simd] Move Store64Lane into shared code

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liftoff-assembler-ia32.h can now use it. TurboFan ia32 doesn't use it
because it generates different instruction codes (movlps, movhps).

Bug: v8:11589
Change-Id: I07540814acff2d8ea48e06d1e00023d80b276a3d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3095009
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/main@{#76373}
This commit is contained in:
Ng Zhi An 2021-08-18 20:15:31 -07:00 committed by V8 LUCI CQ
parent acf0f4698a
commit a9561d1652
5 changed files with 12 additions and 18 deletions
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10
src/codegen/shared-ia32-x64/macro-assembler-shared-ia32-x64.cc
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@ -973,6 +973,16 @@ void SharedTurboAssembler::S128Load32Splat(XMMRegister dst, Operand src) {
}
}
void SharedTurboAssembler::S128Store64Lane(Operand dst, XMMRegister src,
uint8_t laneidx) {
if (laneidx == 0) {
Movlps(dst, src);
} else {
DCHECK_EQ(1, laneidx);
Movhps(dst, src);
}
}
} // namespace internal
} // namespace v8

1
src/codegen/shared-ia32-x64/macro-assembler-shared-ia32-x64.h
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@ -360,6 +360,7 @@ class V8_EXPORT_PRIVATE SharedTurboAssembler : public TurboAssemblerBase {
void S128Load8Splat(XMMRegister dst, Operand src, XMMRegister scratch);
void S128Load16Splat(XMMRegister dst, Operand src, XMMRegister scratch);
void S128Load32Splat(XMMRegister dst, Operand src);
void S128Store64Lane(Operand dst, XMMRegister src, uint8_t laneidx);
private:
template <typename Op>

10
src/codegen/x64/macro-assembler-x64.cc
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@ -2257,16 +2257,6 @@ void TurboAssembler::I16x8Q15MulRSatS(XMMRegister dst, XMMRegister src1,
Pxor(dst, kScratchDoubleReg);
}
void TurboAssembler::S128Store64Lane(Operand dst, XMMRegister src,
uint8_t laneidx) {
if (laneidx == 0) {
Movlps(dst, src);
} else {
DCHECK_EQ(1, laneidx);
Movhps(dst, src);
}
}
void TurboAssembler::I8x16Popcnt(XMMRegister dst, XMMRegister src,
XMMRegister tmp) {
DCHECK_NE(dst, tmp);

2
src/codegen/x64/macro-assembler-x64.h
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@ -481,8 +481,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public SharedTurboAssembler {
// Defined here to allow usage on both TurboFan and Liftoff.
void I16x8Q15MulRSatS(XMMRegister dst, XMMRegister src1, XMMRegister src2);
void S128Store64Lane(Operand dst, XMMRegister src, uint8_t laneidx);
void I8x16Popcnt(XMMRegister dst, XMMRegister src, XMMRegister tmp);
void F64x2ConvertLowI32x4U(XMMRegister dst, XMMRegister src);

7
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
View File

@ -2837,12 +2837,7 @@ void LiftoffAssembler::StoreLane(Register dst, Register offset,
S128Store32Lane(dst_op, src.fp(), lane);
} else {
DCHECK_EQ(MachineRepresentation::kWord64, rep);
if (lane == 0) {
Movlps(dst_op, src.fp());
} else {
DCHECK_EQ(1, lane);
Movhps(dst_op, src.fp());
}
S128Store64Lane(dst_op, src.fp(), lane);
}
}