[ia32] Consolidate f32x4.sqrt instruction codes
Bug: v8:11217 Change-Id: I82719eb2c4b35cc54fc1b4b6f01eca6a48afb152 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2576884 Reviewed-by: Bill Budge <bbudge@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#71672}
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@ -2329,13 +2329,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputOperand(0));
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break;
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}
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case kSSEF32x4Sqrt: {
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__ sqrtps(i.OutputSimd128Register(), i.InputSimd128Register(0));
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break;
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}
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case kAVXF32x4Sqrt: {
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CpuFeatureScope avx_scope(tasm(), AVX);
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__ vsqrtps(i.OutputSimd128Register(), i.InputOperand(0));
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case kIA32F32x4Sqrt: {
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__ Sqrtps(i.OutputSimd128Register(), i.InputSimd128Register(0));
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break;
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}
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case kIA32F32x4RecipApprox: {
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@ -161,8 +161,7 @@ namespace compiler {
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V(AVXF32x4Abs) \
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V(SSEF32x4Neg) \
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V(AVXF32x4Neg) \
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V(SSEF32x4Sqrt) \
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V(AVXF32x4Sqrt) \
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V(IA32F32x4Sqrt) \
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V(IA32F32x4RecipApprox) \
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V(IA32F32x4RecipSqrtApprox) \
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V(SSEF32x4Add) \
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@ -140,8 +140,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kAVXF32x4Abs:
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case kSSEF32x4Neg:
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case kAVXF32x4Neg:
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case kSSEF32x4Sqrt:
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case kAVXF32x4Sqrt:
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case kIA32F32x4Sqrt:
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case kIA32F32x4RecipApprox:
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case kIA32F32x4RecipSqrtApprox:
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case kSSEF32x4Add:
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@ -2211,6 +2211,7 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
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V(I8x16RoundingAverageU)
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#define SIMD_UNOP_LIST(V) \
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V(F32x4Sqrt) \
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V(F32x4SConvertI32x4) \
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V(F32x4RecipApprox) \
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V(F32x4RecipSqrtApprox) \
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@ -2235,7 +2236,6 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
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#define SIMD_UNOP_PREFIX_LIST(V) \
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V(F32x4Abs) \
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V(F32x4Neg) \
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V(F32x4Sqrt) \
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V(S128Not)
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#define SIMD_ANYTRUE_LIST(V) \
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