[ia32] Consolidate f32x4.sqrt instruction codes

Bug: v8:11217
Change-Id: I82719eb2c4b35cc54fc1b4b6f01eca6a48afb152
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2576884
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71672}
This commit is contained in:
Zhi An Ng 2020-12-08 02:25:24 +00:00 committed by Commit Bot
parent cc682a6698
commit acf702b205
4 changed files with 5 additions and 12 deletions

View File

@ -2329,13 +2329,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputOperand(0));
break;
}
case kSSEF32x4Sqrt: {
__ sqrtps(i.OutputSimd128Register(), i.InputSimd128Register(0));
break;
}
case kAVXF32x4Sqrt: {
CpuFeatureScope avx_scope(tasm(), AVX);
__ vsqrtps(i.OutputSimd128Register(), i.InputOperand(0));
case kIA32F32x4Sqrt: {
__ Sqrtps(i.OutputSimd128Register(), i.InputSimd128Register(0));
break;
}
case kIA32F32x4RecipApprox: {

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@ -161,8 +161,7 @@ namespace compiler {
V(AVXF32x4Abs) \
V(SSEF32x4Neg) \
V(AVXF32x4Neg) \
V(SSEF32x4Sqrt) \
V(AVXF32x4Sqrt) \
V(IA32F32x4Sqrt) \
V(IA32F32x4RecipApprox) \
V(IA32F32x4RecipSqrtApprox) \
V(SSEF32x4Add) \

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@ -140,8 +140,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kAVXF32x4Abs:
case kSSEF32x4Neg:
case kAVXF32x4Neg:
case kSSEF32x4Sqrt:
case kAVXF32x4Sqrt:
case kIA32F32x4Sqrt:
case kIA32F32x4RecipApprox:
case kIA32F32x4RecipSqrtApprox:
case kSSEF32x4Add:

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@ -2211,6 +2211,7 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
V(I8x16RoundingAverageU)
#define SIMD_UNOP_LIST(V) \
V(F32x4Sqrt) \
V(F32x4SConvertI32x4) \
V(F32x4RecipApprox) \
V(F32x4RecipSqrtApprox) \
@ -2235,7 +2236,6 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
#define SIMD_UNOP_PREFIX_LIST(V) \
V(F32x4Abs) \
V(F32x4Neg) \
V(F32x4Sqrt) \
V(S128Not)
#define SIMD_ANYTRUE_LIST(V) \