[x64] Use vcvtlsi2sd when AVX is enabled
BUG=v8:4406 LOG=N Review URL: https://codereview.chromium.org/1404903004 Cr-Commit-Position: refs/heads/master@{#31276}
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@ -915,9 +915,9 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
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}
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case kSSEInt32ToFloat64:
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if (instr->InputAt(0)->IsRegister()) {
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__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
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__ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
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} else {
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__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
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__ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
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}
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break;
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case kSSEUint32ToFloat64:
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@ -3047,6 +3047,7 @@ void Assembler::cvttsd2siq(Register dst, const Operand& src) {
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void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) {
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DCHECK(!IsEnabled(AVX));
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EnsureSpace ensure_space(this);
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emit(0xF2);
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emit_optional_rex_32(dst, src);
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@ -3057,6 +3058,7 @@ void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) {
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void Assembler::cvtlsi2sd(XMMRegister dst, Register src) {
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DCHECK(!IsEnabled(AVX));
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EnsureSpace ensure_space(this);
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emit(0xF2);
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emit_optional_rex_32(dst, src);
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@ -1311,6 +1311,13 @@ class Assembler : public AssemblerBase {
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void vminsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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vsd(0x5d, dst, src1, src2);
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}
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void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Register src2) {
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XMMRegister isrc2 = {src2.code()};
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vsd(0x2a, dst, src1, isrc2);
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}
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void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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vsd(0x2a, dst, src1, src2);
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}
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void vucomisd(XMMRegister dst, XMMRegister src);
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void vucomisd(XMMRegister dst, const Operand& src);
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void vsd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
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@ -997,6 +997,11 @@ int DisassemblerX64::AVXInstruction(byte* data) {
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current += PrintRightXMMOperand(current);
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AppendToBuffer(",%s", NameOfXMMRegister(regop));
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break;
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case 0x2a:
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AppendToBuffer("vcvtlsi2sd %s,%s,", NameOfXMMRegister(regop),
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NameOfXMMRegister(vvvv));
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current += PrintRightOperand(current);
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break;
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case 0x58:
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AppendToBuffer("vaddsd %s,%s,", NameOfXMMRegister(regop),
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NameOfXMMRegister(vvvv));
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@ -4774,7 +4774,7 @@ void LCodeGen::DoDeferredNumberTagIU(LInstruction* instr,
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// the value in there. If that fails, call the runtime system.
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__ SmiToInteger32(reg, reg);
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__ xorl(reg, Immediate(0x80000000));
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__ cvtlsi2sd(temp_xmm, reg);
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__ Cvtlsi2sd(temp_xmm, reg);
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} else {
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DCHECK(signedness == UNSIGNED_INT32);
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__ LoadUint32(temp_xmm, reg);
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@ -788,14 +788,26 @@ void MacroAssembler::PopCallerSaved(SaveFPRegsMode fp_mode,
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void MacroAssembler::Cvtlsi2sd(XMMRegister dst, Register src) {
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xorps(dst, dst);
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cvtlsi2sd(dst, src);
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if (CpuFeatures::IsSupported(AVX)) {
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CpuFeatureScope scope(this, AVX);
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vxorpd(dst, dst, dst);
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vcvtlsi2sd(dst, dst, src);
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} else {
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xorps(dst, dst);
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cvtlsi2sd(dst, src);
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}
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}
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void MacroAssembler::Cvtlsi2sd(XMMRegister dst, const Operand& src) {
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xorps(dst, dst);
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cvtlsi2sd(dst, src);
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if (CpuFeatures::IsSupported(AVX)) {
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CpuFeatureScope scope(this, AVX);
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vxorpd(dst, dst, dst);
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vcvtlsi2sd(dst, dst, src);
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} else {
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xorps(dst, dst);
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cvtlsi2sd(dst, src);
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}
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}
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@ -1359,6 +1359,13 @@ TEST(AssemblerX64AVX_sd) {
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__ vmovsd(xmm5, Operand(rsp, kDoubleSize));
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__ vmovsd(xmm6, xmm5);
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__ vmovapd(xmm3, xmm6);
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__ movl(rdi, Immediate(6));
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__ vcvtlsi2sd(xmm6, xmm6, rdi);
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__ movl(Operand(rsp, 0), Immediate(5));
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__ vcvtlsi2sd(xmm7, xmm7, Operand(rsp, 0));
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__ vsubsd(xmm7, xmm6, xmm7); // xmm7 is 1.0
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__ vmulsd(xmm1, xmm1, xmm7);
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__ addq(rsp, Immediate(kDoubleSize * 2));
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__ vucomisd(xmm3, xmm1);
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@ -530,6 +530,8 @@ TEST(DisasmX64) {
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__ vmaxsd(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
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__ vucomisd(xmm9, xmm1);
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__ vucomisd(xmm8, Operand(rbx, rdx, times_2, 10981));
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__ vcvtlsi2sd(xmm5, xmm9, rcx);
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__ vcvtlsi2sd(xmm9, xmm3, Operand(rbx, r9, times_4, 10000));
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__ vandps(xmm0, xmm9, xmm2);
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__ vandps(xmm9, xmm1, Operand(rbx, rcx, times_4, 10000));
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