AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

PPC/S390: [lite] Allocate feedback vectors lazily

Browse Source 
Port: 7629afdb9d

Original Commit Message:

    Allocate feedback vectors lazily when the function's interrupt budget has
    reached a specified threshold. This cl introduces a new field in the
    ClosureFeedbackCellArray to track the interrupt budget for allocating
    feedback vectors. Using the interrupt budget on the bytecode array could
    cause problems when there are closures across native contexts and we may
    delay allocating feedback vectors in one of them causing unexpected
    performance cliffs. In the long term we may want to remove interrupt budget
    from bytecode array and use context specific budget for tiering up decisions
    as well.

Change-Id: I261a7f7cedbdaa3be2d0cf22bfa701598f749fd9
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1539794
Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#60479}
This commit is contained in:
Milad Farazmand 2019-03-26 12:09:38 -04:00 committed by Commit Bot
parent dfc0100aff
commit b0cfb7786b
2 changed files with 22 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/builtins/ppc/builtins-ppc.cc
View File

@ -1101,11 +1101,17 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
FrameScope frame_scope(masm, StackFrame::MANUAL);
__ PushStandardFrame(closure);
// Reset code age.
__ mov(r8, Operand(BytecodeArray::kNoAgeBytecodeAge));
__ StoreByte(r8, FieldMemOperand(kInterpreterBytecodeArrayRegister,
BytecodeArray::kBytecodeAgeOffset),
r0);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset are
// 8-bit fields next to each other, so we could just optimize by writing a
// 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOSRNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ li(r8, Operand(0));
__ StoreHalfWord(r8,
FieldMemOperand(kInterpreterBytecodeArrayRegister,
BytecodeArray::kOSRNestingLevelOffset),
r0);
// Load initial bytecode offset.
__ mov(kInterpreterBytecodeOffsetRegister,

16
src/builtins/s390/builtins-s390.cc
View File

@ -1152,11 +1152,17 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
FrameScope frame_scope(masm, StackFrame::MANUAL);
__ PushStandardFrame(closure);
// Reset code age.
__ mov(r1, Operand(BytecodeArray::kNoAgeBytecodeAge));
__ StoreByte(r1, FieldMemOperand(kInterpreterBytecodeArrayRegister,
BytecodeArray::kBytecodeAgeOffset),
r0);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset are
// 8-bit fields next to each other, so we could just optimize by writing a
// 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOSRNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ lghi(r1, Operand(0));
__ StoreHalfWord(r1,
FieldMemOperand(kInterpreterBytecodeArrayRegister,
BytecodeArray::kOSRNestingLevelOffset),
r0);
// Load the initial bytecode offset.
__ mov(kInterpreterBytecodeOffsetRegister,