diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc index 989a748933..167334f39a 100644 --- a/src/x64/assembler-x64.cc +++ b/src/x64/assembler-x64.cc @@ -1084,18 +1084,19 @@ void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) { // Sadly, there is no zero or sign extending move for 8-bit immediates. if (is_int32(value)) { movq(dst, Immediate(static_cast(value))); + return; } else if (is_uint32(value)) { movl(dst, Immediate(static_cast(value))); + return; } // Value cannot be represented by 32 bits, so do a full 64 bit immediate // value. - } else { - EnsureSpace ensure_space(this); - last_pc_ = pc_; - emit_rex_64(dst); - emit(0xB8 | dst.low_bits()); - emitq(value, rmode); } + EnsureSpace ensure_space(this); + last_pc_ = pc_; + emit_rex_64(dst); + emit(0xB8 | dst.low_bits()); + emitq(value, rmode); } diff --git a/src/x64/codegen-x64.cc b/src/x64/codegen-x64.cc index b4568237ae..b1f2b8fbce 100644 --- a/src/x64/codegen-x64.cc +++ b/src/x64/codegen-x64.cc @@ -5644,7 +5644,7 @@ void CompareStub::Generate(MacroAssembler* masm) { // The representation of NaN values has all exponent bits (52..62) set, // and not all mantissa bits (0..51) clear. // Read double representation into rax. - __ movq(rbx, 0x7ff0000000000000, RelocInfo::NONE); + __ movq(rbx, V8_UINT64_C(0x7ff0000000000000), RelocInfo::NONE); __ movq(rax, FieldOperand(rdx, HeapNumber::kValueOffset)); // Test that exponent bits are all set. __ or_(rbx, rax); @@ -5655,10 +5655,7 @@ void CompareStub::Generate(MacroAssembler* masm) { // If all bits in the mantissa are zero the number is Infinity, and // we return zero. Otherwise it is a NaN, and we return non-zero. // We cannot just return rax because only eax is tested on return. - // TODO(X64): Solve this using movcc, when implemented. - __ movq(kScratchRegister, rax); - __ shr(kScratchRegister, Immediate(32)); - __ or_(rax, kScratchRegister); + __ setcc(not_zero, rax); __ ret(0); __ bind(¬_identical);