AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

Use RelocInfo::IsNone in a few more places.

Browse Source 
I had missed some earlier.

Followup to:
https://chromiumcodereview.appspot.com/11695006/

There are now NONE and NONE64 RelocInfo types, but only ARM uses them
both at the same time. They were added in:
https://chromiumcodereview.appspot.com/11191029/

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11742045
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13317 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
ulan@chromium.org 2013-01-07 09:15:25 +00:00
parent ee563d7875
commit b73db972e2
3 changed files with 10 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/ia32/assembler-ia32-inl.h
View File

@ -396,7 +396,7 @@ void Assembler::emit_code_relative_offset(Label* label) {
void Assembler::emit_w(const Immediate& x) {
ASSERT(x.rmode_ == RelocInfo::NONE32);
ASSERT(RelocInfo::IsNone(x.rmode_));
uint16_t value = static_cast<uint16_t>(x.x_);
reinterpret_cast<uint16_t*>(pc_)[0] = value;
pc_ += sizeof(uint16_t);

12
src/ia32/assembler-ia32.cc
View File

@ -255,11 +255,11 @@ void RelocInfo::PatchCodeWithCall(Address target, int guard_bytes) {
Operand::Operand(Register base, int32_t disp, RelocInfo::Mode rmode) {
// [base + disp/r]
if (disp == 0 && rmode == RelocInfo::NONE32 && !base.is(ebp)) {
if (disp == 0 && RelocInfo::IsNone(rmode) && !base.is(ebp)) {
// [base]
set_modrm(0, base);
if (base.is(esp)) set_sib(times_1, esp, base);
} else if (is_int8(disp) && rmode == RelocInfo::NONE32) {
} else if (is_int8(disp) && RelocInfo::IsNone(rmode)) {
// [base + disp8]
set_modrm(1, base);
if (base.is(esp)) set_sib(times_1, esp, base);
@ -280,11 +280,11 @@ Operand::Operand(Register base,
RelocInfo::Mode rmode) {
ASSERT(!index.is(esp)); // illegal addressing mode
// [base + index*scale + disp/r]
if (disp == 0 && rmode == RelocInfo::NONE32 && !base.is(ebp)) {
if (disp == 0 && RelocInfo::IsNone(rmode) && !base.is(ebp)) {
// [base + index*scale]
set_modrm(0, esp);
set_sib(scale, index, base);
} else if (is_int8(disp) && rmode == RelocInfo::NONE32) {
} else if (is_int8(disp) && RelocInfo::IsNone(rmode)) {
// [base + index*scale + disp8]
set_modrm(1, esp);
set_sib(scale, index, base);
@ -1180,7 +1180,7 @@ void Assembler::test(Register reg, const Immediate& imm) {
EnsureSpace ensure_space(this);
// Only use test against byte for registers that have a byte
// variant: eax, ebx, ecx, and edx.
if (imm.rmode_ == RelocInfo::NONE32 &&
if (RelocInfo::IsNone(imm.rmode_) &&
is_uint8(imm.x_) &&
reg.is_byte_register()) {
uint8_t imm8 = imm.x_;
@ -2614,7 +2614,7 @@ void Assembler::emit_operand(Register reg, const Operand& adr) {
pc_ += length;
// Emit relocation information if necessary.
if (length >= sizeof(int32_t) && adr.rmode_ != RelocInfo::NONE32) {
if (length >= sizeof(int32_t) && !RelocInfo::IsNone(adr.rmode_)) {
pc_ -= sizeof(int32_t); // pc_ must be *at* disp32
RecordRelocInfo(adr.rmode_);
pc_ += sizeof(int32_t);

6
src/ia32/assembler-ia32.h
View File

@ -337,12 +337,12 @@ class Immediate BASE_EMBEDDED {
return Immediate(label);
}
bool is_zero() const { return x_ == 0 && rmode_ == RelocInfo::NONE32; }
bool is_zero() const { return x_ == 0 && RelocInfo::IsNone(rmode_); }
bool is_int8() const {
return -128 <= x_ && x_ < 128 && rmode_ == RelocInfo::NONE32;
return -128 <= x_ && x_ < 128 && RelocInfo::IsNone(rmode_);
}
bool is_int16() const {
return -32768 <= x_ && x_ < 32768 && rmode_ == RelocInfo::NONE32;
return -32768 <= x_ && x_ < 32768 && RelocInfo::IsNone(rmode_);
}
private: