[wasm-simd][liftoff][arm][arm64] Implement extract_lane
Implement all 8 extract_lane ops on ARM and ARM64. Bug: v8:9909 Change-Id: I72e30b53c92933bd5830008ec02e1f4526e8b4c4 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2103169 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#66735}
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@ -1562,7 +1562,8 @@ void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "f64x2extractlane");
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ExtractLane(dst.fp(), liftoff::GetSimd128Register(lhs.low_fp()),
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1579,7 +1580,8 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "f32x4extractlane");
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ExtractLane(liftoff::GetFloatRegister(dst.fp()),
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liftoff::GetSimd128Register(lhs.low_fp()), imm_lane_idx);
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}
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void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1600,7 +1602,10 @@ void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i64x2extractlane");
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ExtractLane(dst.low_gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonS32,
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imm_lane_idx * 2);
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ExtractLane(dst.high_gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonS32,
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imm_lane_idx * 2 + 1);
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}
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void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1618,7 +1623,8 @@ void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i32x4extractlane");
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ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonS32,
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1643,13 +1649,15 @@ void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
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void LiftoffAssembler::emit_i16x8_extract_lane_u(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i16x8extractlane_u");
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ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonU16,
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_i16x8_extract_lane_s(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i16x8extractlane_s");
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ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonS16,
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
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@ -1660,13 +1668,15 @@ void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i8x16extractlane_u");
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ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonU8,
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_i8x16_extract_lane_s(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i8x16extractlane_s");
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ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs.low_fp()), NeonS8,
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imm_lane_idx);
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}
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void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1092,7 +1092,7 @@ void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "f64x2extractlane");
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Mov(dst.fp().D(), lhs.fp().V2D(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1108,7 +1108,7 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "f32x4extractlane");
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Mov(dst.fp().S(), lhs.fp().V4S(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1124,7 +1124,7 @@ void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i64x2extractlane");
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Mov(dst.gp().X(), lhs.fp().V2D(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1140,7 +1140,7 @@ void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i32x4extractlane");
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Mov(dst.gp().W(), lhs.fp().V4S(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1156,13 +1156,13 @@ void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i16x8_extract_lane_u(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i16x8extractlane_u");
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Umov(dst.gp().W(), lhs.fp().V8H(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i16x8_extract_lane_s(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i16x8extractlane_s");
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Smov(dst.gp().W(), lhs.fp().V8H(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
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@ -1178,13 +1178,13 @@ void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
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void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i8x16extractlane_u");
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Umov(dst.gp().W(), lhs.fp().V16B(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i8x16_extract_lane_s(LiftoffRegister dst,
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LiftoffRegister lhs,
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uint8_t imm_lane_idx) {
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bailout(kSimd, "i8x16extractlane_s");
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Smov(dst.gp().W(), lhs.fp().V16B(), imm_lane_idx);
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}
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void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
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