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[ARM64] [turbofan] Support Float64Min and Float64Max.

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ARM64 support for Float64Min and Float64Max machine operators
(https://codereview.chromium.org/998283002/) using fmin and fmax.

BUG=

Review URL: https://codereview.chromium.org/1024093002

Cr-Commit-Position: refs/heads/master@{#27361}
This commit is contained in:
jacob.bramley 2015-03-23 03:25:11 -07:00 committed by Commit bot
parent f8c4c12728
commit b9ef7d4267
3 changed files with 27 additions and 3 deletions
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10
src/compiler/arm64/code-generator-arm64.cc
View File

@ -740,6 +740,14 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ Fmov(i.OutputFloat64Register(), i.InputRegister(0));
break;
}
case kArm64Float64Max:
__ Fmax(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
i.InputDoubleRegister(1));
break;
case kArm64Float64Min:
__ Fmin(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
i.InputDoubleRegister(1));
break;
case kArm64Ldrb:
__ Ldrb(i.OutputRegister(), i.MemoryOperand());
break;
@ -842,7 +850,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
ASSEMBLE_CHECKED_STORE_FLOAT(64);
break;
}
}
} // NOLINT(readability/fn_size)
// Assemble branches after this instruction.

2
src/compiler/arm64/instruction-codes-arm64.h
View File

@ -101,6 +101,8 @@ namespace compiler {
V(Arm64Float64InsertLowWord32) \
V(Arm64Float64InsertHighWord32) \
V(Arm64Float64MoveU64) \
V(Arm64Float64Max) \
V(Arm64Float64Min) \
V(Arm64LdrS) \
V(Arm64StrS) \
V(Arm64LdrD) \

18
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -1104,10 +1104,22 @@ void InstructionSelector::VisitFloat64Mod(Node* node) {
}
void InstructionSelector::VisitFloat64Max(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitFloat64Max(Node* node) {
Arm64OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
Emit(kArm64Float64Max, g.DefineAsRegister(node), g.UseRegister(left),
g.UseRegister(right));
}
void InstructionSelector::VisitFloat64Min(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitFloat64Min(Node* node) {
Arm64OperandGenerator g(this);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
Emit(kArm64Float64Min, g.DefineAsRegister(node), g.UseRegister(left),
g.UseRegister(right));
}
void InstructionSelector::VisitFloat64Sqrt(Node* node) {
@ -1681,6 +1693,8 @@ InstructionSelector::SupportedMachineOperatorFlags() {
return MachineOperatorBuilder::kFloat64RoundDown |
MachineOperatorBuilder::kFloat64RoundTruncate |
MachineOperatorBuilder::kFloat64RoundTiesAway |
MachineOperatorBuilder::kFloat64Max |
MachineOperatorBuilder::kFloat64Min |
MachineOperatorBuilder::kWord32ShiftIsSafe |
MachineOperatorBuilder::kInt32DivIsSafe |
MachineOperatorBuilder::kUint32DivIsSafe;