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Revert of [ia32] Fixes a bug in cmpw. (patchset #3 id:40001 of https://codereview.chromium.org/2103713003/ )

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Reason for revert:
Causes "buildbot failure in V8 on V8 Linux gcc 4.8, Check"

Original issue's description:
> [ia32] Fixes a bug in cmpw.
>
> The opcodes for 'cmpw r/m16, r16' and 'cmpw r16, r/m16' were swapped, causing a few issues when less than/greater than comparison were performed.
>
> Adds a regression test.
>
> BUG=621926
>
> Committed: https://crrev.com/efa7095e3e360fbadbe909d831ac11b268ca26b0
> Cr-Commit-Position: refs/heads/master@{#37339}

TBR=bmeurer@chromium.org
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=621926

Review-Url: https://codereview.chromium.org/2106913002
Cr-Commit-Position: refs/heads/master@{#37342}
This commit is contained in:
epertoso 2016-06-28 10:42:46 -07:00 committed by Commit bot
parent dd0ee5fd11
commit bcdd031590
3 changed files with 6 additions and 52 deletions
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4
src/ia32/assembler-ia32.cc
View File

@ -852,14 +852,14 @@ void Assembler::cmpw(const Operand& op, Immediate imm16) {
void Assembler::cmpw(Register reg, const Operand& op) {
EnsureSpace ensure_space(this);
EMIT(0x66);
EMIT(0x3B);
EMIT(0x39);
emit_operand(reg, op);
}
void Assembler::cmpw(const Operand& op, Register reg) {
EnsureSpace ensure_space(this);
EMIT(0x66);
EMIT(0x39);
EMIT(0x3B);
emit_operand(reg, op);
}

21
src/ia32/disasm-ia32.cc
View File

@ -1622,19 +1622,11 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
while (*data == 0x66) data++;
if (*data == 0xf && data[1] == 0x1f) {
AppendToBuffer("nop"); // 0x66 prefix
} else if (*data == 0x39) {
} else if (*data == 0x90) {
AppendToBuffer("nop"); // 0x66 prefix
} else if (*data == 0x8B) {
data++;
data += PrintOperands("cmpw", OPER_REG_OP_ORDER, data);
} else if (*data == 0x3B) {
data++;
data += PrintOperands("cmpw", REG_OPER_OP_ORDER, data);
} else if (*data == 0x81) {
data++;
AppendToBuffer("cmpw ");
data += PrintRightOperand(data);
int imm = *reinterpret_cast<int16_t*>(data);
AppendToBuffer(",0x%x", imm);
data += 2;
data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data);
} else if (*data == 0x87) {
data++;
int mod, regop, rm;
@ -1648,11 +1640,6 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
AppendToBuffer("mov_w ");
data += PrintRightOperand(data);
AppendToBuffer(",%s", NameOfCPURegister(regop));
} else if (*data == 0x8B) {
data++;
data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data);
} else if (*data == 0x90) {
AppendToBuffer("nop"); // 0x66 prefix
} else if (*data == 0xC7) {
data++;
AppendToBuffer("%s ", "mov_w");

33
test/cctest/test-assembler-ia32.cc
View File

@ -1497,37 +1497,4 @@ TEST(AssemblerIa32JumpTables2) {
}
}
TEST(Regress621926) {
// Bug description:
// The opcodes for cmpw r/m16, r16 and cmpw r16, r/m16 were swapped.
// This was causing non-commutative comparisons to produce the wrong result.
CcTest::InitializeVM();
Isolate* isolate = reinterpret_cast<Isolate*>(CcTest::isolate());
HandleScope scope(isolate);
Assembler assm(isolate, nullptr, 0);
int16_t a = 42;
Label fail;
__ mov(ebx, Immediate(reinterpret_cast<intptr_t>(&a)));
__ mov(eax, Immediate(41));
__ cmpw(eax, Operand(ebx));
__ j(above_equal, &fail);
__ cmpw(Operand(ebx), eax);
__ j(below_equal, &fail);
__ mov(eax, 1);
__ ret(0);
__ bind(&fail);
__ mov(eax, 0);
__ ret(0);
CodeDesc desc;
assm.GetCode(&desc);
Handle<Code> code = isolate->factory()->NewCode(
desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
F0 f = FUNCTION_CAST<F0>(code->entry());
CHECK_EQ(f(), 1);
}
#undef __