[arm] Don't overwrite input in atomic ops
The Arm atomic operations used an input register as a temporary, corrupting it for future uses. Fix this by adding another temporary, the impact of which is partly reduced by removing the "unique" requirement on the address base register. Bug: Change-Id: I99a7bc3c14100d64cb7478e2053cf83ab6dcea50 Reviewed-on: https://chromium-review.googlesource.com/795953 Commit-Queue: Martyn Capewell <martyn.capewell@arm.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Ben Smith <binji@chromium.org> Cr-Commit-Position: refs/heads/master@{#49785}
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Martyn Capewell
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@ -435,27 +435,27 @@ Condition FlagsConditionToCondition(FlagsCondition condition) {
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#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_instr, store_instr) \
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do { \
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Label exchange; \
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__ add(i.InputRegister(0), i.InputRegister(0), i.InputRegister(1)); \
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1)); \
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__ dmb(ISH); \
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__ bind(&exchange); \
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__ load_instr(i.OutputRegister(0), i.InputRegister(0)); \
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__ store_instr(i.TempRegister(0), i.InputRegister(2), i.InputRegister(0)); \
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__ load_instr(i.OutputRegister(0), i.TempRegister(1)); \
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__ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
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__ teq(i.TempRegister(0), Operand(0)); \
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__ b(ne, &exchange); \
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__ dmb(ISH); \
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} while (0)
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#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(load_instr, store_instr) \
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#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(load_instr, store_instr, \
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cmp_reg) \
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do { \
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Label compareExchange; \
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Label exit; \
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__ add(i.InputRegister(0), i.InputRegister(0), i.InputRegister(1)); \
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__ dmb(ISH); \
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__ bind(&compareExchange); \
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__ load_instr(i.OutputRegister(0), i.InputRegister(0)); \
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__ teq(i.InputRegister(2), Operand(i.OutputRegister(0))); \
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__ load_instr(i.OutputRegister(0), i.TempRegister(1)); \
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__ teq(cmp_reg, Operand(i.OutputRegister(0))); \
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__ b(ne, &exit); \
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__ store_instr(i.TempRegister(0), i.InputRegister(3), i.InputRegister(0)); \
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__ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
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__ teq(i.TempRegister(0), Operand(0)); \
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__ b(ne, &compareExchange); \
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__ bind(&exit); \
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@ -465,14 +465,14 @@ Condition FlagsConditionToCondition(FlagsCondition condition) {
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#define ASSEMBLE_ATOMIC_BINOP(load_instr, store_instr, bin_instr) \
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do { \
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Label binop; \
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__ add(i.InputRegister(0), i.InputRegister(0), i.InputRegister(1)); \
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1)); \
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__ dmb(ISH); \
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__ bind(&binop); \
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__ load_instr(i.OutputRegister(0), i.InputRegister(0)); \
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__ load_instr(i.OutputRegister(0), i.TempRegister(1)); \
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__ bin_instr(i.TempRegister(0), i.OutputRegister(0), \
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Operand(i.InputRegister(2))); \
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__ store_instr(i.TempRegister(1), i.TempRegister(0), i.InputRegister(0)); \
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__ teq(i.TempRegister(1), Operand(0)); \
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__ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
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__ teq(i.TempRegister(2), Operand(0)); \
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__ b(ne, &binop); \
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__ dmb(ISH); \
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} while (0)
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@ -2642,25 +2642,35 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrex, strex);
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break;
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case kAtomicCompareExchangeInt8:
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__ uxtb(i.InputRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb);
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
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__ uxtb(i.TempRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb,
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i.TempRegister(2));
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__ sxtb(i.OutputRegister(0), i.OutputRegister(0));
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break;
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case kAtomicCompareExchangeUint8:
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__ uxtb(i.InputRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb);
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
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__ uxtb(i.TempRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb,
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i.TempRegister(2));
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break;
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case kAtomicCompareExchangeInt16:
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__ uxth(i.InputRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh);
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
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__ uxth(i.TempRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh,
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i.TempRegister(2));
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__ sxth(i.OutputRegister(0), i.OutputRegister(0));
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break;
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case kAtomicCompareExchangeUint16:
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__ uxth(i.InputRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh);
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
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__ uxth(i.TempRegister(2), i.InputRegister(2));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh,
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i.TempRegister(2));
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break;
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case kAtomicCompareExchangeWord32:
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrex, strex);
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__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
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ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrex, strex,
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i.InputRegister(2));
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break;
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#define ATOMIC_BINOP_CASE(op, inst) \
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case kAtomic##op##Int8: \
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@ -2276,15 +2276,14 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
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AddressingMode addressing_mode = kMode_Offset_RR;
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InstructionOperand inputs[3];
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size_t input_count = 0;
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inputs[input_count++] = g.UseUniqueRegister(base);
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inputs[input_count++] = g.UseRegister(base);
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inputs[input_count++] = g.UseRegister(index);
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inputs[input_count++] = g.UseUniqueRegister(value);
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InstructionOperand outputs[1];
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outputs[0] = g.DefineAsRegister(node);
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InstructionOperand temp[1];
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temp[0] = g.TempRegister();
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InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
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InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
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Emit(code, 1, outputs, input_count, inputs, 1, temp);
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Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
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}
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void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
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@ -2313,16 +2312,16 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
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AddressingMode addressing_mode = kMode_Offset_RR;
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InstructionOperand inputs[4];
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size_t input_count = 0;
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inputs[input_count++] = g.UseUniqueRegister(base);
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inputs[input_count++] = g.UseRegister(base);
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inputs[input_count++] = g.UseRegister(index);
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inputs[input_count++] = g.UseUniqueRegister(old_value);
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inputs[input_count++] = g.UseUniqueRegister(new_value);
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InstructionOperand outputs[1];
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outputs[0] = g.DefineAsRegister(node);
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InstructionOperand temp[1];
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temp[0] = g.TempRegister();
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InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(),
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g.TempRegister()};
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InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
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Emit(code, 1, outputs, input_count, inputs, 1, temp);
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Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
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}
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void InstructionSelector::VisitAtomicBinaryOperation(
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@ -2352,17 +2351,15 @@ void InstructionSelector::VisitAtomicBinaryOperation(
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AddressingMode addressing_mode = kMode_Offset_RR;
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InstructionOperand inputs[3];
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size_t input_count = 0;
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inputs[input_count++] = g.UseUniqueRegister(base);
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inputs[input_count++] = g.UseRegister(base);
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inputs[input_count++] = g.UseRegister(index);
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inputs[input_count++] = g.UseUniqueRegister(value);
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InstructionOperand outputs[1];
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outputs[0] = g.DefineAsRegister(node);
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InstructionOperand temps[2];
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size_t temp_count = 0;
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temps[temp_count++] = g.TempRegister();
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temps[temp_count++] = g.TempRegister();
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InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(),
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g.TempRegister()};
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InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
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Emit(code, 1, outputs, input_count, inputs, temp_count, temps);
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Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
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}
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#define VISIT_ATOMIC_BINOP(op) \
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