From c07f022565a85457b2a9b741656f426f9016709d Mon Sep 17 00:00:00 2001 From: mbrandy Date: Mon, 25 Apr 2016 14:44:49 -0700 Subject: [PATCH] PPC64: [turbofan] Fix checked loads/stores. This refines e7d521fb5fb9229a65672b04797a29b7a1b6f315 -- as we still require clean up of the uint index register. TEST=mjsunit/asm/float32array-negative-offset R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com BUG= Review URL: https://codereview.chromium.org/1919003004 Cr-Commit-Position: refs/heads/master@{#35778} --- src/compiler/ppc/code-generator-ppc.cc | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/compiler/ppc/code-generator-ppc.cc b/src/compiler/ppc/code-generator-ppc.cc index 47df565bb1..34a66fd6bd 100644 --- a/src/compiler/ppc/code-generator-ppc.cc +++ b/src/compiler/ppc/code-generator-ppc.cc @@ -525,6 +525,12 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ } while (0) +#if V8_TARGET_ARCH_PPC64 +// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits. +#define CleanUInt32(x) __ ClearLeftImm(x, x, Operand(32)) +#else +#define CleanUInt32(x) +#endif #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, asm_instrx, width) \ do { \ @@ -544,13 +550,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { if (mode == kMode_MRI) { \ __ asm_instr(result, operand); \ } else { \ + CleanUInt32(offset); \ __ asm_instrx(result, operand); \ } \ __ bind(ool->exit()); \ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ } while (0) - #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr, asm_instrx) \ do { \ Register result = i.OutputRegister(); \ @@ -569,13 +575,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { if (mode == kMode_MRI) { \ __ asm_instr(result, operand); \ } else { \ + CleanUInt32(offset); \ __ asm_instrx(result, operand); \ } \ __ bind(ool->exit()); \ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ } while (0) - #define ASSEMBLE_CHECKED_STORE_FLOAT32() \ do { \ Label done; \ @@ -595,13 +601,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { if (mode == kMode_MRI) { \ __ stfs(kScratchDoubleReg, operand); \ } else { \ + CleanUInt32(offset); \ __ stfsx(kScratchDoubleReg, operand); \ } \ __ bind(&done); \ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ } while (0) - #define ASSEMBLE_CHECKED_STORE_DOUBLE() \ do { \ Label done; \ @@ -620,13 +626,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { if (mode == kMode_MRI) { \ __ stfd(value, operand); \ } else { \ + CleanUInt32(offset); \ __ stfdx(value, operand); \ } \ __ bind(&done); \ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \ } while (0) - #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr, asm_instrx) \ do { \ Label done; \ @@ -645,6 +651,7 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { if (mode == kMode_MRI) { \ __ asm_instr(value, operand); \ } else { \ + CleanUInt32(offset); \ __ asm_instrx(value, operand); \ } \ __ bind(&done); \