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[wasm-simd][liftoff] Implement i32x4.splat

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Bug: v8:9909
Change-Id: I53d3b95e1f22e0194ac1a2ed7b556189acb8f9ad
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2023399
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66036}
This commit is contained in:
Ng Zhi An 2020-01-27 16:42:04 -08:00 committed by Commit Bot
parent 3dbbb37223
commit c10153b4e9
8 changed files with 31 additions and 2 deletions
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5
src/wasm/baseline/arm/liftoff-assembler-arm.h
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@ -1536,6 +1536,11 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
vdup(Neon32, liftoff::GetSimd128Register(dst.low_fp()), src.fp(), 0);
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
vdup(Neon32, liftoff::GetSimd128Register(dst.low_fp()), src.gp());
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
ldr(limit_address, MemOperand(limit_address));
cmp(sp, limit_address);

5
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
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@ -1074,6 +1074,11 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
Dup(dst.fp().V4S(), src.fp().S(), 0);
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
Dup(dst.fp().V4S(), src.gp().W());
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
Ldr(limit_address, MemOperand(limit_address));
Cmp(sp, limit_address);

6
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
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@ -1925,6 +1925,12 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
}
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
Movd(dst.fp(), src.gp());
Pshufd(dst.fp(), dst.fp(), 0);
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
cmp(esp, Operand(limit_address, 0));
j(below_equal, ool_code);

1
src/wasm/baseline/liftoff-assembler.h
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@ -680,6 +680,7 @@ class LiftoffAssembler : public TurboAssembler {
DoubleRegister lhs, DoubleRegister rhs);
inline void emit_f32x4_splat(LiftoffRegister dst, LiftoffRegister src);
inline void emit_i32x4_splat(LiftoffRegister dst, LiftoffRegister src);
inline void StackCheck(Label* ool_code, Register limit_address);

6
src/wasm/baseline/liftoff-compiler.cc
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@ -2205,6 +2205,12 @@ class LiftoffCompiler {
__ emit_f32x4_splat(dst, src);
});
break;
case wasm::kExprI32x4Splat:
EmitUnOp<kWasmI32, kWasmS128>(
[=](LiftoffRegister dst, LiftoffRegister src) {
__ emit_i32x4_splat(dst, src);
});
break;
default:
unsupported(decoder, kSimd, "simd");
}

6
src/wasm/baseline/x64/liftoff-assembler-x64.h
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@ -1773,6 +1773,12 @@ void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
Shufps(dst.fp(), src.fp(), static_cast<byte>(0));
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
Movd(dst.fp(), src.gp());
Pshufd(dst.fp(), dst.fp(), static_cast<uint8_t>(0));
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
cmpq(rsp, Operand(limit_address, 0));
j(below_equal, ool_code);

2
test/cctest/wasm/test-run-wasm-simd.cc
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@ -1550,7 +1550,7 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Qfms) {
}
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64
WASM_SIMD_TEST(I32x4Splat) {
WASM_SIMD_TEST_WITH_LIFTOFF(I32x4Splat) {
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
// Set up a global to hold output vector.
int32_t* g = r.builder().AddGlobal<int32_t>(kWasmS128);

2
test/message/wasm-trace-memory-liftoff.out
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@ -7,5 +7,5 @@ liftoff func: 2+0x3 load from 00000002 val: f32:68169720922112.00000
liftoff func: 4+0x5 store to 00000004 val: i8:171 / ab
liftoff func: 0+0x3 load from 00000002 val: i32:1454047232 / 56ab0000
liftoff func: 2+0x3 load from 00000002 val: f32:94008244174848.000000 / 56ab0000
turbofan func: 6+0x7 store to 00000004 val: s128:48879 48879 48879 48879 / 0000beef 0000beef 0000beef 0000beef
liftoff func: 6+0x7 store to 00000004 val: s128:48879 48879 48879 48879 / 0000beef 0000beef 0000beef 0000beef
liftoff func: 5+0x3 load from 00000002 val: s128:-1091633152 -1091633152 -1091633152 -1091633152 / beef0000 beef0000 beef0000 beef0000