MIPS: Reland of Fix bad RegisterConfiguration usage in InstructionSequence unit tests
Reland 0cf5623220
The original patch got reverted because testing RegisterConfiguration was
overwritten by turbofan RegisterConfiguration. This caused some test cases not being
properly tested. The new patch uses correct RegisterConfiguration.
Original commit message:
Test InstructionSequenceTest has been initialized with a testing RegisterConfiguration
instance defined in instruction-sequence-unittest.h, whereas class ExplicitOperand which
is being tested used RegisterConfiguration from instruction.cc. In case these two
instances are different, the tests would fail. The issue is fixed by using the same
instance of RegisterConfiguration both for test code and code under test.
Additionally, the tests in register-allocator-unittest.cc use hardcoded values
for register and begin failing is the hardcoded register is not available for
allocation. Fix by forcing the use of allocatable registers only.
TEST=unittests.MoveOptimizerTest.RemovesRedundantExplicit,unittests.RegisterAllocatorTest.SpillPhi
BUG=
Review-Url: https://codereview.chromium.org/2595293002
Cr-Commit-Position: refs/heads/master@{#41938}
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@ -12,7 +12,8 @@ namespace v8 {
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namespace internal {
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namespace internal {
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namespace compiler {
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namespace compiler {
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const auto GetRegConfig = RegisterConfiguration::Turbofan;
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const RegisterConfiguration* (*GetRegConfig)() =
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RegisterConfiguration::Turbofan;
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FlagsCondition CommuteFlagsCondition(FlagsCondition condition) {
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FlagsCondition CommuteFlagsCondition(FlagsCondition condition) {
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switch (condition) {
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switch (condition) {
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@ -985,6 +986,21 @@ void InstructionSequence::PrintBlock(int block_id) const {
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PrintBlock(GetRegConfig(), block_id);
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PrintBlock(GetRegConfig(), block_id);
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}
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}
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const RegisterConfiguration*
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InstructionSequence::registerConfigurationForTesting_ = nullptr;
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const RegisterConfiguration*
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InstructionSequence::RegisterConfigurationForTesting() {
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DCHECK(registerConfigurationForTesting_ != nullptr);
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return registerConfigurationForTesting_;
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}
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void InstructionSequence::SetRegisterConfigurationForTesting(
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const RegisterConfiguration* regConfig) {
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registerConfigurationForTesting_ = regConfig;
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GetRegConfig = InstructionSequence::RegisterConfigurationForTesting;
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}
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FrameStateDescriptor::FrameStateDescriptor(
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FrameStateDescriptor::FrameStateDescriptor(
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Zone* zone, FrameStateType type, BailoutId bailout_id,
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Zone* zone, FrameStateType type, BailoutId bailout_id,
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OutputFrameStateCombine state_combine, size_t parameters_count,
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OutputFrameStateCombine state_combine, size_t parameters_count,
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@ -1570,12 +1570,19 @@ class V8_EXPORT_PRIVATE InstructionSequence final
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void ValidateDeferredBlockEntryPaths() const;
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void ValidateDeferredBlockEntryPaths() const;
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void ValidateSSA() const;
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void ValidateSSA() const;
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static void SetRegisterConfigurationForTesting(
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const RegisterConfiguration* regConfig);
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static void ClearRegisterConfigurationForTesting();
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private:
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private:
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friend V8_EXPORT_PRIVATE std::ostream& operator<<(
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friend V8_EXPORT_PRIVATE std::ostream& operator<<(
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std::ostream& os, const PrintableInstructionSequence& code);
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std::ostream& os, const PrintableInstructionSequence& code);
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typedef ZoneMap<const Instruction*, SourcePosition> SourcePositionMap;
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typedef ZoneMap<const Instruction*, SourcePosition> SourcePositionMap;
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static const RegisterConfiguration* RegisterConfigurationForTesting();
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static const RegisterConfiguration* registerConfigurationForTesting_;
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Isolate* isolate_;
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Isolate* isolate_;
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Zone* const zone_;
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Zone* const zone_;
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InstructionBlocks* const instruction_blocks_;
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InstructionBlocks* const instruction_blocks_;
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@ -85,7 +85,7 @@ int InstructionSequenceTest::GetAllocatableCode(int index,
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}
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}
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}
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}
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RegisterConfiguration* InstructionSequenceTest::config() {
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const RegisterConfiguration* InstructionSequenceTest::config() {
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if (!config_) {
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if (!config_) {
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config_.reset(new RegisterConfiguration(
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config_.reset(new RegisterConfiguration(
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num_general_registers_, num_double_registers_, num_general_registers_,
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num_general_registers_, num_double_registers_, num_general_registers_,
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@ -105,6 +105,8 @@ InstructionSequence* InstructionSequenceTest::sequence() {
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if (sequence_ == nullptr) {
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if (sequence_ == nullptr) {
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sequence_ = new (zone())
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sequence_ = new (zone())
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InstructionSequence(isolate(), zone(), &instruction_blocks_);
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InstructionSequence(isolate(), zone(), &instruction_blocks_);
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sequence_->SetRegisterConfigurationForTesting(
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InstructionSequenceTest::config());
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}
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}
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return sequence_;
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return sequence_;
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}
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}
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@ -158,7 +158,7 @@ class InstructionSequenceTest : public TestWithIsolateAndZone {
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void SetNumRegs(int num_general_registers, int num_double_registers);
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void SetNumRegs(int num_general_registers, int num_double_registers);
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int GetNumRegs(MachineRepresentation rep);
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int GetNumRegs(MachineRepresentation rep);
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int GetAllocatableCode(int index, MachineRepresentation rep = kNoRep);
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int GetAllocatableCode(int index, MachineRepresentation rep = kNoRep);
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RegisterConfiguration* config();
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const RegisterConfiguration* config();
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InstructionSequence* sequence();
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InstructionSequence* sequence();
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void StartLoop(int loop_blocks);
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void StartLoop(int loop_blocks);
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