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[mips][wasm-simd][liftoff] Implement i64x2 shr_s and shr_u

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Port 99a361eec6
https://crrev.com/c/2198456

Change-Id: I5a1b4085de9e41ce122eef12aaaeb3c3c038d27c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2203369
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#67819}
This commit is contained in:
Zhao Jiazhong 2020-05-15 02:19:11 -04:00 committed by Commit Bot
parent d5f7622136
commit c47e1b217d
2 changed files with 46 additions and 0 deletions
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22
src/wasm/baseline/mips/liftoff-assembler-mips.h
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@ -1959,6 +1959,28 @@ void LiftoffAssembler::emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i64x2_shli");
}
void LiftoffAssembler::emit_i64x2_shr_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i64x2_shr_s");
}
void LiftoffAssembler::emit_i64x2_shri_s(LiftoffRegister dst,
LiftoffRegister lhs, int32_t rhs) {
bailout(kSimd, "emit_i64x2_shri_s");
}
void LiftoffAssembler::emit_i64x2_shr_u(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i64x2_shr_u");
}
void LiftoffAssembler::emit_i64x2_shri_u(LiftoffRegister dst,
LiftoffRegister lhs, int32_t rhs) {
bailout(kSimd, "emit_i64x2_shri_u");
}
void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i64x2_add");

24
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
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@ -1794,6 +1794,30 @@ void LiftoffAssembler::emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs,
slli_d(dst.fp().toW(), lhs.fp().toW(), rhs & 63);
}
void LiftoffAssembler::emit_i64x2_shr_s(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
fill_d(kSimd128ScratchReg, rhs.gp());
sra_d(dst.fp().toW(), lhs.fp().toW(), kSimd128ScratchReg);
}
void LiftoffAssembler::emit_i64x2_shri_s(LiftoffRegister dst,
LiftoffRegister lhs, int32_t rhs) {
srai_d(dst.fp().toW(), lhs.fp().toW(), rhs & 63);
}
void LiftoffAssembler::emit_i64x2_shr_u(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
fill_d(kSimd128ScratchReg, rhs.gp());
srl_d(dst.fp().toW(), lhs.fp().toW(), kSimd128ScratchReg);
}
void LiftoffAssembler::emit_i64x2_shri_u(LiftoffRegister dst,
LiftoffRegister lhs, int32_t rhs) {
srli_d(dst.fp().toW(), lhs.fp().toW(), rhs & 63);
}
void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
addv_d(dst.fp().toW(), lhs.fp().toW(), rhs.fp().toW());