From c5fe2cb3d4ec9ab4da77e2b69749e8d154c708dd Mon Sep 17 00:00:00 2001
From: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Date: Wed, 3 Jun 2020 04:24:08 -0400
Subject: [PATCH] [mips][wasm-simd][liftoff] Implement bitmask

Port aa5bcc09bf7d5d77056e6033918d79c30aa3f49a
https://crrev.com/c/2225090

Change-Id: Ib3b159ebcee0d4da5ce003b08d02cd36b7218016
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2228097
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#68138}
---
 .../baseline/mips/liftoff-assembler-mips.h    | 15 +++++++
 .../mips64/liftoff-assembler-mips64.h         | 44 +++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/src/wasm/baseline/mips/liftoff-assembler-mips.h b/src/wasm/baseline/mips/liftoff-assembler-mips.h
index c08977365c..9c30f0fed9 100644
--- a/src/wasm/baseline/mips/liftoff-assembler-mips.h
+++ b/src/wasm/baseline/mips/liftoff-assembler-mips.h
@@ -1787,6 +1787,11 @@ void LiftoffAssembler::emit_v8x16_alltrue(LiftoffRegister dst,
   bailout(kSimd, "emit_v8x16_alltrue");
 }
 
+void LiftoffAssembler::emit_i8x16_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  bailout(kSimd, "emit_i8x16_bitmask");
+}
+
 void LiftoffAssembler::emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   bailout(kSimd, "emit_i8x16_shl");
@@ -1897,6 +1902,11 @@ void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
   bailout(kSimd, "emit_v16x8_alltrue");
 }
 
+void LiftoffAssembler::emit_i16x8_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  bailout(kSimd, "emit_i16x8_bitmask");
+}
+
 void LiftoffAssembler::emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   bailout(kSimd, "emit_i16x8_shl");
@@ -2007,6 +2017,11 @@ void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
   bailout(kSimd, "emit_v32x4_alltrue");
 }
 
+void LiftoffAssembler::emit_i32x4_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  bailout(kSimd, "emit_i32x4_bitmask");
+}
+
 void LiftoffAssembler::emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   bailout(kSimd, "emit_i32x4_shl");
diff --git a/src/wasm/baseline/mips64/liftoff-assembler-mips64.h b/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
index 3e599f8489..ea43efed5c 100644
--- a/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
+++ b/src/wasm/baseline/mips64/liftoff-assembler-mips64.h
@@ -1695,6 +1695,22 @@ void LiftoffAssembler::emit_v8x16_alltrue(LiftoffRegister dst,
   liftoff::EmitAllTrue(this, dst, src, MSA_BRANCH_B);
 }
 
+void LiftoffAssembler::emit_i8x16_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  MSARegister scratch0 = kSimd128RegZero;
+  MSARegister scratch1 = kSimd128ScratchReg;
+  srli_b(scratch0, src.fp().toW(), 7);
+  srli_h(scratch1, scratch0, 7);
+  or_v(scratch0, scratch0, scratch1);
+  srli_w(scratch1, scratch0, 14);
+  or_v(scratch0, scratch0, scratch1);
+  srli_d(scratch1, scratch0, 28);
+  or_v(scratch0, scratch0, scratch1);
+  shf_w(scratch1, scratch0, 0x0E);
+  ilvev_b(scratch0, scratch1, scratch0);
+  copy_u_h(dst.gp(), scratch0, 0);
+}
+
 void LiftoffAssembler::emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   fill_b(kSimd128ScratchReg, rhs.gp());
@@ -1809,6 +1825,21 @@ void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
   liftoff::EmitAllTrue(this, dst, src, MSA_BRANCH_H);
 }
 
+void LiftoffAssembler::emit_i16x8_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  MSARegister scratch0 = kSimd128RegZero;
+  MSARegister scratch1 = kSimd128ScratchReg;
+  srli_h(scratch0, src.fp().toW(), 15);
+  srli_w(scratch1, scratch0, 15);
+  or_v(scratch0, scratch0, scratch1);
+  srli_d(scratch1, scratch0, 30);
+  or_v(scratch0, scratch0, scratch1);
+  shf_w(scratch1, scratch0, 0x0E);
+  slli_d(scratch1, scratch1, 4);
+  or_v(scratch0, scratch0, scratch1);
+  copy_u_b(dst.gp(), scratch0, 0);
+}
+
 void LiftoffAssembler::emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   fill_h(kSimd128ScratchReg, rhs.gp());
@@ -1923,6 +1954,19 @@ void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
   liftoff::EmitAllTrue(this, dst, src, MSA_BRANCH_W);
 }
 
+void LiftoffAssembler::emit_i32x4_bitmask(LiftoffRegister dst,
+                                          LiftoffRegister src) {
+  MSARegister scratch0 = kSimd128RegZero;
+  MSARegister scratch1 = kSimd128ScratchReg;
+  srli_w(scratch0, src.fp().toW(), 31);
+  srli_d(scratch1, scratch0, 31);
+  or_v(scratch0, scratch0, scratch1);
+  shf_w(scratch1, scratch0, 0x0E);
+  slli_d(scratch1, scratch1, 2);
+  or_v(scratch0, scratch0, scratch1);
+  copy_u_b(dst.gp(), scratch0, 0);
+}
+
 void LiftoffAssembler::emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   fill_w(kSimd128ScratchReg, rhs.gp());