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[mips][liftoff]Fix some instructions

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This fix the following instructions:
kExprI32SConvertF64 in mips32, RecordSpillsInSafepoint in mips32 and mips64.

Change-Id: I762fe4a7afa06fa8470fb0de932756a145d66099
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2605905
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71889}
This commit is contained in:
LiuYu 2020-12-29 11:39:52 +08:00 committed by Commit Bot
parent d5662577fe
commit cbed76b711
3 changed files with 20 additions and 33 deletions
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38
src/wasm/baseline/mips/liftoff-assembler-mips.h
View File

@ -1333,25 +1333,25 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
return true;
}
case kExprI32SConvertF64: {
if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
IsFp64Mode()) {
LiftoffRegister rounded =
GetUnusedRegister(kFpReg, LiftoffRegList::ForRegs(src));
LiftoffRegister converted_back =
GetUnusedRegister(kFpReg, LiftoffRegList::ForRegs(src, rounded));
LiftoffRegister scratch =
GetUnusedRegister(kGpReg, LiftoffRegList::ForRegs(dst));
LiftoffRegister scratch2 =
GetUnusedRegister(kGpReg, LiftoffRegList::ForRegs(dst, scratch));
// Real conversion.
TurboAssembler::Trunc_d_d(rounded.fp(), src.fp());
TurboAssembler::Trunc_w_d(kScratchDoubleReg, rounded.fp());
mfc1(dst.gp(), kScratchDoubleReg);
// Checking if trap.
cvt_d_w(converted_back.fp(), kScratchDoubleReg);
TurboAssembler::CompareF64(EQ, rounded.fp(), converted_back.fp());
TurboAssembler::BranchFalseF(trap);
return true;
}
bailout(kUnsupportedArchitecture, "kExprI32SConvertF64");
// Clear cumulative exception flags and save the FCSR.
cfc1(scratch2.gp(), FCSR);
ctc1(zero_reg, FCSR);
// Try a conversion to a signed integer.
trunc_w_d(kScratchDoubleReg, src.fp());
mfc1(dst.gp(), kScratchDoubleReg);
// Retrieve and restore the FCSR.
cfc1(scratch.gp(), FCSR);
ctc1(scratch2.gp(), FCSR);
// Check for overflow and NaNs.
And(scratch.gp(), scratch.gp(),
kFCSROverflowFlagMask | kFCSRUnderflowFlagMask |
kFCSRInvalidOpFlagMask);
Branch(trap, ne, scratch.gp(), Operand(zero_reg));
return true;
}
case kExprI32UConvertF64: {
@ -2757,7 +2757,7 @@ void LiftoffAssembler::RecordSpillsInSafepoint(Safepoint& safepoint,
int spill_offset) {
int spill_space_size = 0;
while (!all_spills.is_empty()) {
LiftoffRegister reg = all_spills.GetLastRegSet();
LiftoffRegister reg = all_spills.GetFirstRegSet();
if (ref_spills.has(reg)) {
safepoint.DefinePointerSlot(spill_offset);
}

8
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View File

@ -2898,14 +2898,8 @@ void LiftoffAssembler::RecordSpillsInSafepoint(Safepoint& safepoint,
LiftoffRegList ref_spills,
int spill_offset) {
int spill_space_size = 0;
bool needs_padding =
(base::bits::CountPopulation(all_spills.GetGpList()) & 1) != 0;
if (needs_padding) {
spill_space_size += kSystemPointerSize;
++spill_offset;
}
while (!all_spills.is_empty()) {
LiftoffRegister reg = all_spills.GetLastRegSet();
LiftoffRegister reg = all_spills.GetFirstRegSet();
if (ref_spills.has(reg)) {
safepoint.DefinePointerSlot(spill_offset);
}

7
test/cctest/cctest.status
View File

@ -365,13 +365,6 @@
'test-run-machops/RunFloat64MulAndFloat64Sub2': [SKIP],
}], # 'mips_arch_variant == r6'
##############################################################################
['arch == mipsel and mips_arch_variant == r1', {
# For MIPS architecture release 1, conversion from double to int is unsupport
# on liftoff.
'test-gc/RunWasmLiftoff_NewDefault': [SKIP],
}], # 'arch == mipsel and mips_arch_variant == r1'
##############################################################################
['system == android', {
# Uses too much memory.