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Land two MIPS changes.

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Issue 8368021: MIPS: port Fix compilation on ARM and x64 broken by r9738
 Issue 8378001: MIPS: port Avoid static initializers in assember-arm.h.
Review URL: http://codereview.chromium.org/8341048

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9781 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
fschneider@chromium.org 2011-10-26 08:17:24 +00:00
parent 93f5bfdb98
commit d022406db2
2 changed files with 10 additions and 7 deletions
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15
src/mips/assembler-mips-inl.h
View File

@ -116,10 +116,10 @@ int RelocInfo::target_address_size() {
}
void RelocInfo::set_target_address(Address target) {
void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) {
ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
Assembler::set_target_address_at(pc_, target);
if (host() != NULL && IsCodeTarget(rmode_)) {
if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) {
Object* target_code = Code::GetCodeFromTargetAddress(target);
host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
host(), this, HeapObject::cast(target_code));
@ -150,10 +150,12 @@ Object** RelocInfo::target_object_address() {
}
void RelocInfo::set_target_object(Object* target) {
void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) {
ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
if (host() != NULL && target->IsHeapObject()) {
if (mode == UPDATE_WRITE_BARRIER &&
host() != NULL &&
target->IsHeapObject()) {
host()->GetHeap()->incremental_marking()->RecordWrite(
host(), &Memory::Object_at(pc_), HeapObject::cast(target));
}
@ -184,11 +186,12 @@ JSGlobalPropertyCell* RelocInfo::target_cell() {
}
void RelocInfo::set_target_cell(JSGlobalPropertyCell* cell) {
void RelocInfo::set_target_cell(JSGlobalPropertyCell* cell,
WriteBarrierMode mode) {
ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
Address address = cell->address() + JSGlobalPropertyCell::kValueOffset;
Memory::Address_at(pc_) = address;
if (host() != NULL) {
if (mode == UPDATE_WRITE_BARRIER && host() != NULL) {
// TODO(1550) We are passing NULL as a slot because cell can never be on
// evacuation candidate.
host()->GetHeap()->incremental_marking()->RecordWrite(

2
src/mips/assembler-mips.h
View File

@ -302,7 +302,7 @@ const FPURegister f29 = { 29 };
const FPURegister f30 = { 30 };
const FPURegister f31 = { 31 };
const FPURegister kDoubleRegZero = f28;
static const FPURegister& kDoubleRegZero = f28;
// FPU (coprocessor 1) control registers.
// Currently only FCSR (#31) is implemented.