AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

[wasm-simd][ia32] Optimize pmin/pmax for AVX

Browse Source 
We don't need DefineSameAsFirst for AVX, this can save some moves.

Bug: v8:11190
Change-Id: I301896527cbeab62636b4af744ab0d3b42094ae2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2727152
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73177}
This commit is contained in:
Ng Zhi An 2021-03-01 11:24:11 -08:00 committed by Commit Bot
parent 6445c959c4
commit d2948ce943
2 changed files with 12 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
src/compiler/backend/ia32/code-generator-ia32.cc
View File

@ -1997,15 +1997,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kIA32F64x2Pmin: { case kIA32F64x2Pmin: {
XMMRegister dst = i.OutputSimd128Register(); __ Minpd(i.OutputSimd128Register(), i.InputSimd128Register(0),
DCHECK_EQ(dst, i.InputSimd128Register(0)); i.InputSimd128Register(1));
__ Minpd(dst, dst, i.InputSimd128Register(1));
break; break;
} }
case kIA32F64x2Pmax: { case kIA32F64x2Pmax: {
XMMRegister dst = i.OutputSimd128Register(); __ Maxpd(i.OutputSimd128Register(), i.InputSimd128Register(0),
DCHECK_EQ(dst, i.InputSimd128Register(0)); i.InputSimd128Register(1));
__ Maxpd(dst, dst, i.InputSimd128Register(1));
break; break;
} }
case kIA32F64x2Round: { case kIA32F64x2Round: {
@ -2524,15 +2522,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kIA32F32x4Pmin: { case kIA32F32x4Pmin: {
XMMRegister dst = i.OutputSimd128Register(); __ Minps(i.OutputSimd128Register(), i.InputSimd128Register(0),
DCHECK_EQ(dst, i.InputSimd128Register(0)); i.InputSimd128Register(1));
__ Minps(dst, dst, i.InputSimd128Register(1));
break; break;
} }
case kIA32F32x4Pmax: { case kIA32F32x4Pmax: {
XMMRegister dst = i.OutputSimd128Register(); __ Maxps(i.OutputSimd128Register(), i.InputSimd128Register(0),
DCHECK_EQ(dst, i.InputSimd128Register(0)); i.InputSimd128Register(1));
__ Maxps(dst, dst, i.InputSimd128Register(1));
break; break;
} }
case kIA32F32x4Round: { case kIA32F32x4Round: {

6
src/compiler/backend/ia32/instruction-selector-ia32.cc
View File

@ -3039,8 +3039,10 @@ void VisitPminOrPmax(InstructionSelector* selector, Node* node,
// Due to the way minps/minpd work, we want the dst to be same as the second // Due to the way minps/minpd work, we want the dst to be same as the second
// input: b = pmin(a, b) directly maps to minps b a. // input: b = pmin(a, b) directly maps to minps b a.
IA32OperandGenerator g(selector); IA32OperandGenerator g(selector);
selector->Emit(opcode, g.DefineSameAsFirst(node), InstructionOperand dst = selector->IsSupported(AVX)
g.UseRegister(node->InputAt(1)), ? g.DefineAsRegister(node)
: g.DefineSameAsFirst(node);
selector->Emit(opcode, dst, g.UseRegister(node->InputAt(1)),
g.UseRegister(node->InputAt(0))); g.UseRegister(node->InputAt(0)));
} }
} // namespace } // namespace