[turbofan] Replace shr of masked bits with zero

If (mask >>> s) == 0, ((x & mask) >> s) == 0, so replace the node with zero in
MachineOperatorReducer.

BUG=

Review-Url: https://codereview.chromium.org/2069973002
Cr-Commit-Position: refs/heads/master@{#37046}
This commit is contained in:
martyn.capewell 2016-06-16 21:48:31 -07:00 committed by Commit bot
parent 01e956c50e
commit d3597aee1f
3 changed files with 39 additions and 9 deletions

View File

@ -153,14 +153,8 @@ Reduction MachineOperatorReducer::Reduce(Node* node) {
}
case IrOpcode::kWord32Shl:
return ReduceWord32Shl(node);
case IrOpcode::kWord32Shr: {
Uint32BinopMatcher m(node);
if (m.right().Is(0)) return Replace(m.left().node()); // x >>> 0 => x
if (m.IsFoldable()) { // K >>> K => K
return ReplaceInt32(m.left().Value() >> m.right().Value());
}
return ReduceWord32Shifts(node);
}
case IrOpcode::kWord32Shr:
return ReduceWord32Shr(node);
case IrOpcode::kWord32Sar:
return ReduceWord32Sar(node);
case IrOpcode::kWord32Ror: {
@ -825,6 +819,25 @@ Reduction MachineOperatorReducer::ReduceWord32Shl(Node* node) {
return ReduceWord32Shifts(node);
}
Reduction MachineOperatorReducer::ReduceWord32Shr(Node* node) {
Uint32BinopMatcher m(node);
if (m.right().Is(0)) return Replace(m.left().node()); // x >>> 0 => x
if (m.IsFoldable()) { // K >>> K => K
return ReplaceInt32(m.left().Value() >> m.right().Value());
}
if (m.left().IsWord32And() && m.right().HasValue()) {
Uint32BinopMatcher mleft(m.left().node());
if (mleft.right().HasValue()) {
uint32_t shift = m.right().Value() & 0x1f;
uint32_t mask = mleft.right().Value();
if ((mask >> shift) == 0) {
// (m >>> s) == 0 implies ((x & m) >>> s) == 0
return ReplaceInt32(0);
}
}
}
return ReduceWord32Shifts(node);
}
Reduction MachineOperatorReducer::ReduceWord32Sar(Node* node) {
Int32BinopMatcher m(node);

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@ -74,6 +74,7 @@ class MachineOperatorReducer final : public Reducer {
Reduction ReduceProjection(size_t index, Node* node);
Reduction ReduceWord32Shifts(Node* node);
Reduction ReduceWord32Shl(Node* node);
Reduction ReduceWord32Shr(Node* node);
Reduction ReduceWord32Sar(Node* node);
Reduction ReduceWord32And(Node* node);
Reduction ReduceWord32Or(Node* node);

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@ -850,8 +850,24 @@ TEST_F(MachineOperatorReducerTest, Word32SarWithWord32ShlAndLoad) {
// -----------------------------------------------------------------------------
// Word32Shl
// Word32Shr
TEST_F(MachineOperatorReducerTest, Word32ShrWithWord32And) {
Node* const p0 = Parameter(0);
TRACED_FORRANGE(int32_t, shift, 1, 31) {
uint32_t mask = (1 << shift) - 1;
Node* node = graph()->NewNode(
machine()->Word32Shr(),
graph()->NewNode(machine()->Word32And(), p0, Int32Constant(mask)),
Int32Constant(shift));
Reduction r = Reduce(node);
ASSERT_TRUE(r.Changed());
EXPECT_THAT(r.replacement(), IsInt32Constant(0));
}
}
// -----------------------------------------------------------------------------
// Word32Shl
TEST_F(MachineOperatorReducerTest, Word32ShlWithZeroShift) {
Node* p0 = Parameter(0);