[turbofan] Replace shr of masked bits with zero
If (mask >>> s) == 0, ((x & mask) >> s) == 0, so replace the node with zero in MachineOperatorReducer. BUG= Review-Url: https://codereview.chromium.org/2069973002 Cr-Commit-Position: refs/heads/master@{#37046}
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@ -153,14 +153,8 @@ Reduction MachineOperatorReducer::Reduce(Node* node) {
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}
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case IrOpcode::kWord32Shl:
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return ReduceWord32Shl(node);
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case IrOpcode::kWord32Shr: {
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Uint32BinopMatcher m(node);
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if (m.right().Is(0)) return Replace(m.left().node()); // x >>> 0 => x
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if (m.IsFoldable()) { // K >>> K => K
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return ReplaceInt32(m.left().Value() >> m.right().Value());
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}
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return ReduceWord32Shifts(node);
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}
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case IrOpcode::kWord32Shr:
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return ReduceWord32Shr(node);
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case IrOpcode::kWord32Sar:
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return ReduceWord32Sar(node);
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case IrOpcode::kWord32Ror: {
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@ -825,6 +819,25 @@ Reduction MachineOperatorReducer::ReduceWord32Shl(Node* node) {
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return ReduceWord32Shifts(node);
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}
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Reduction MachineOperatorReducer::ReduceWord32Shr(Node* node) {
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Uint32BinopMatcher m(node);
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if (m.right().Is(0)) return Replace(m.left().node()); // x >>> 0 => x
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if (m.IsFoldable()) { // K >>> K => K
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return ReplaceInt32(m.left().Value() >> m.right().Value());
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}
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if (m.left().IsWord32And() && m.right().HasValue()) {
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Uint32BinopMatcher mleft(m.left().node());
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if (mleft.right().HasValue()) {
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uint32_t shift = m.right().Value() & 0x1f;
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uint32_t mask = mleft.right().Value();
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if ((mask >> shift) == 0) {
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// (m >>> s) == 0 implies ((x & m) >>> s) == 0
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return ReplaceInt32(0);
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}
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}
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}
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return ReduceWord32Shifts(node);
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}
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Reduction MachineOperatorReducer::ReduceWord32Sar(Node* node) {
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Int32BinopMatcher m(node);
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@ -74,6 +74,7 @@ class MachineOperatorReducer final : public Reducer {
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Reduction ReduceProjection(size_t index, Node* node);
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Reduction ReduceWord32Shifts(Node* node);
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Reduction ReduceWord32Shl(Node* node);
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Reduction ReduceWord32Shr(Node* node);
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Reduction ReduceWord32Sar(Node* node);
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Reduction ReduceWord32And(Node* node);
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Reduction ReduceWord32Or(Node* node);
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@ -850,8 +850,24 @@ TEST_F(MachineOperatorReducerTest, Word32SarWithWord32ShlAndLoad) {
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// -----------------------------------------------------------------------------
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// Word32Shl
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// Word32Shr
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TEST_F(MachineOperatorReducerTest, Word32ShrWithWord32And) {
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Node* const p0 = Parameter(0);
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TRACED_FORRANGE(int32_t, shift, 1, 31) {
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uint32_t mask = (1 << shift) - 1;
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Node* node = graph()->NewNode(
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machine()->Word32Shr(),
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graph()->NewNode(machine()->Word32And(), p0, Int32Constant(mask)),
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Int32Constant(shift));
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Reduction r = Reduce(node);
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ASSERT_TRUE(r.Changed());
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EXPECT_THAT(r.replacement(), IsInt32Constant(0));
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}
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}
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// -----------------------------------------------------------------------------
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// Word32Shl
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TEST_F(MachineOperatorReducerTest, Word32ShlWithZeroShift) {
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Node* p0 = Parameter(0);
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