[Turbofan] Clean up register allocator and verifier code.

- Improves RegisterName display in register allocator.
- Removes GetFixedRegisters method in preparation for having multiple fp
reg types.
- Clean up some verifier code.

LOG=N
BUG=v8:4124

Review-Url: https://codereview.chromium.org/2081443002
Cr-Commit-Position: refs/heads/master@{#37076}
This commit is contained in:
bbudge 2016-06-18 16:16:56 -07:00 committed by Commit bot
parent 57733bdd78
commit d99e1ab605
3 changed files with 37 additions and 41 deletions

View File

@ -99,12 +99,12 @@ class FinalAssessment final : public Assessment {
virtual_register_(virtual_register),
original_pending_assessment_(original_pending) {}
int virtual_register() const { return virtual_register_; }
static const FinalAssessment* cast(const Assessment* assessment) {
CHECK(assessment->kind() == Final);
return static_cast<const FinalAssessment*>(assessment);
}
int virtual_register() const { return virtual_register_; }
const PendingAssessment* original_pending_assessment() const {
return original_pending_assessment_;
}
@ -116,17 +116,11 @@ class FinalAssessment final : public Assessment {
DISALLOW_COPY_AND_ASSIGN(FinalAssessment);
};
struct OperandAsKeyLess {
bool operator()(const InstructionOperand& a,
const InstructionOperand& b) const {
return a.CompareCanonicalized(b);
}
};
// Assessments associated with a basic block.
class BlockAssessments : public ZoneObject {
public:
typedef ZoneMap<InstructionOperand, Assessment*, OperandAsKeyLess> OperandMap;
typedef ZoneMap<InstructionOperand, Assessment*, CompareOperandModuloType>
OperandMap;
explicit BlockAssessments(Zone* zone)
: map_(zone), map_for_moves_(zone), zone_(zone) {}
void Drop(InstructionOperand operand) { map_.erase(operand); }
@ -204,11 +198,11 @@ class RegisterAllocatorVerifier final : public ZoneObject {
class DelayedAssessments : public ZoneObject {
public:
typedef ZoneMap<InstructionOperand, int, CompareOperandModuloType>
OperandMap;
explicit DelayedAssessments(Zone* zone) : map_(zone) {}
const ZoneMap<InstructionOperand, int, OperandAsKeyLess>& map() const {
return map_;
}
const OperandMap& map() const { return map_; }
void AddDelayedAssessment(InstructionOperand op, int vreg) {
auto it = map_.find(op);
@ -220,7 +214,7 @@ class RegisterAllocatorVerifier final : public ZoneObject {
}
private:
ZoneMap<InstructionOperand, int, OperandAsKeyLess> map_;
OperandMap map_;
};
Zone* zone() const { return zone_; }

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@ -2552,20 +2552,17 @@ void RegisterAllocator::Spill(LiveRange* range) {
range->Spill();
}
const ZoneVector<TopLevelLiveRange*>& RegisterAllocator::GetFixedRegisters()
const {
return mode() == FP_REGISTERS ? data()->fixed_double_live_ranges()
: data()->fixed_live_ranges();
}
const char* RegisterAllocator::RegisterName(int register_code) const {
if (mode() == GENERAL_REGISTERS) {
return data()->config()->GetGeneralRegisterName(register_code);
} else {
return data()->config()->GetDoubleRegisterName(register_code);
const char* RegisterAllocator::RegisterName(MachineRepresentation rep,
int code) const {
switch (rep) {
case MachineRepresentation::kFloat32:
return data()->config()->GetFloatRegisterName(code);
case MachineRepresentation::kFloat64:
return data()->config()->GetDoubleRegisterName(code);
default:
break;
}
return data()->config()->GetGeneralRegisterName(code);
}
@ -2606,11 +2603,14 @@ void LinearScanAllocator::AllocateRegisters() {
SortUnhandled();
DCHECK(UnhandledIsSorted());
auto& fixed_ranges = GetFixedRegisters();
for (TopLevelLiveRange* current : fixed_ranges) {
if (current != nullptr) {
DCHECK_EQ(mode(), current->kind());
AddToInactive(current);
if (mode() == GENERAL_REGISTERS) {
for (TopLevelLiveRange* current : data()->fixed_live_ranges()) {
if (current != nullptr) AddToInactive(current);
}
} else {
DCHECK(mode() == FP_REGISTERS);
for (TopLevelLiveRange* current : data()->fixed_double_live_ranges()) {
if (current != nullptr) AddToInactive(current);
}
}
@ -2778,6 +2778,7 @@ void LinearScanAllocator::InactiveToActive(LiveRange* range) {
bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
MachineRepresentation rep = current->representation();
LifetimePosition free_until_pos[RegisterConfiguration::kMaxFPRegisters];
for (int i = 0; i < num_registers(); i++) {
@ -2785,10 +2786,10 @@ bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
}
for (LiveRange* cur_active : active_live_ranges()) {
free_until_pos[cur_active->assigned_register()] =
LifetimePosition::GapFromInstructionIndex(0);
int cur_reg = cur_active->assigned_register();
free_until_pos[cur_reg] = LifetimePosition::GapFromInstructionIndex(0);
TRACE("Register %s is free until pos %d (1)\n",
RegisterName(cur_active->assigned_register()),
RegisterName(cur_active->representation(), cur_reg),
LifetimePosition::GapFromInstructionIndex(0).value());
}
@ -2799,7 +2800,8 @@ bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
if (!next_intersection.IsValid()) continue;
int cur_reg = cur_inactive->assigned_register();
free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection);
TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg),
TRACE("Register %s is free until pos %d (2)\n",
RegisterName(cur_inactive->representation(), cur_reg),
Min(free_until_pos[cur_reg], next_intersection).value());
}
@ -2807,14 +2809,14 @@ bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
if (current->FirstHintPosition(&hint_register) != nullptr) {
TRACE(
"Found reg hint %s (free until [%d) for live range %d:%d (end %d[).\n",
RegisterName(hint_register), free_until_pos[hint_register].value(),
RegisterName(rep, hint_register), free_until_pos[hint_register].value(),
current->TopLevel()->vreg(), current->relative_id(),
current->End().value());
// The desired register is free until the end of the current live range.
if (free_until_pos[hint_register] >= current->End()) {
TRACE("Assigning preferred reg %s to live range %d:%d\n",
RegisterName(hint_register), current->TopLevel()->vreg(),
RegisterName(rep, hint_register), current->TopLevel()->vreg(),
current->relative_id());
SetLiveRangeAssignedRegister(current, hint_register);
return true;
@ -2847,7 +2849,7 @@ bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
// Register reg is available at the range start and is free until
// the range end.
DCHECK(pos >= current->End());
TRACE("Assigning free reg %s to live range %d:%d\n", RegisterName(reg),
TRACE("Assigning free reg %s to live range %d:%d\n", RegisterName(rep, reg),
current->TopLevel()->vreg(), current->relative_id());
SetLiveRangeAssignedRegister(current, reg);
@ -2932,7 +2934,8 @@ void LinearScanAllocator::AllocateBlockedReg(LiveRange* current) {
// Register reg is not blocked for the whole range.
DCHECK(block_pos[reg] >= current->End());
TRACE("Assigning blocked reg %s to live range %d:%d\n", RegisterName(reg),
TRACE("Assigning blocked reg %s to live range %d:%d\n",
RegisterName(current->representation(), reg),
current->TopLevel()->vreg(), current->relative_id());
SetLiveRangeAssignedRegister(current, reg);

View File

@ -999,8 +999,7 @@ class RegisterAllocator : public ZoneObject {
LifetimePosition FindOptimalSpillingPos(LiveRange* range,
LifetimePosition pos);
const ZoneVector<TopLevelLiveRange*>& GetFixedRegisters() const;
const char* RegisterName(int allocation_index) const;
const char* RegisterName(MachineRepresentation rep, int code) const;
private:
RegisterAllocationData* const data_;