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ARM64: Remove ToOperand32I and ToOperand32U.

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These were front-ends to ToOperand32, to specify sign-extension.
However, since r22148, bits 63-32 are ignored for 32-bit operations
anyway, so there's no need for the caller to be explicit.

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/483263003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
Jacob.Bramley@arm.com 2014-08-19 13:32:24 +00:00
parent b488b2ed29
commit dabb34b28b
2 changed files with 20 additions and 55 deletions
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53
src/arm64/lithium-codegen-arm64.cc
View File

@ -1226,17 +1226,7 @@ Operand LCodeGen::ToOperand(LOperand* op) {
}
Operand LCodeGen::ToOperand32I(LOperand* op) {
return ToOperand32(op, SIGNED_INT32);
}
Operand LCodeGen::ToOperand32U(LOperand* op) {
return ToOperand32(op, UNSIGNED_INT32);
}
Operand LCodeGen::ToOperand32(LOperand* op, IntegerSignedness signedness) {
Operand LCodeGen::ToOperand32(LOperand* op) {
DCHECK(op != NULL);
if (op->IsRegister()) {
return Operand(ToRegister32(op));
@ -1245,10 +1235,7 @@ Operand LCodeGen::ToOperand32(LOperand* op, IntegerSignedness signedness) {
HConstant* constant = chunk()->LookupConstant(const_op);
Representation r = chunk_->LookupLiteralRepresentation(const_op);
if (r.IsInteger32()) {
DCHECK(constant->HasInteger32Value());
return (signedness == SIGNED_INT32)
? Operand(constant->Integer32Value())
: Operand(static_cast<uint32_t>(constant->Integer32Value()));
return Operand(constant->Integer32Value());
} else {
// Other constants not implemented.
Abort(kToOperand32UnsupportedImmediate);
@ -1314,12 +1301,10 @@ Handle<Object> LCodeGen::ToHandle(LConstantOperand* op) const {
}
template<class LI>
Operand LCodeGen::ToShiftedRightOperand32(LOperand* right, LI* shift_info,
IntegerSignedness signedness) {
template <class LI>
Operand LCodeGen::ToShiftedRightOperand32(LOperand* right, LI* shift_info) {
if (shift_info->shift() == NO_SHIFT) {
return (signedness == SIGNED_INT32) ? ToOperand32I(right)
: ToOperand32U(right);
return ToOperand32(right);
} else {
return Operand(
ToRegister32(right),
@ -1501,7 +1486,7 @@ void LCodeGen::DoAccessArgumentsAt(LAccessArgumentsAt* instr) {
}
} else {
Register length = ToRegister32(instr->length());
Operand index = ToOperand32I(instr->index());
Operand index = ToOperand32(instr->index());
__ Sub(result.W(), length, index);
__ Add(result.W(), result.W(), 1);
__ Ldr(result, MemOperand(arguments, result, UXTW, kPointerSizeLog2));
@ -1525,7 +1510,7 @@ void LCodeGen::DoAddI(LAddI* instr) {
bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
Register result = ToRegister32(instr->result());
Register left = ToRegister32(instr->left());
Operand right = ToShiftedRightOperand32I(instr->right(), instr);
Operand right = ToShiftedRightOperand32(instr->right(), instr);
if (can_overflow) {
__ Adds(result, left, right);
@ -1804,7 +1789,7 @@ void LCodeGen::DoArithmeticT(LArithmeticT* instr) {
void LCodeGen::DoBitI(LBitI* instr) {
Register result = ToRegister32(instr->result());
Register left = ToRegister32(instr->left());
Operand right = ToShiftedRightOperand32U(instr->right(), instr);
Operand right = ToShiftedRightOperand32(instr->right(), instr);
switch (instr->op()) {
case Token::BIT_AND: __ And(result, left, right); break;
@ -1838,13 +1823,13 @@ void LCodeGen::DoBoundsCheck(LBoundsCheck *instr) {
DCHECK(instr->hydrogen()->index()->representation().IsInteger32());
DCHECK(instr->hydrogen()->length()->representation().IsInteger32());
if (instr->index()->IsConstantOperand()) {
Operand index = ToOperand32I(instr->index());
Operand index = ToOperand32(instr->index());
Register length = ToRegister32(instr->length());
__ Cmp(length, index);
cond = CommuteCondition(cond);
} else {
Register index = ToRegister32(instr->index());
Operand length = ToOperand32I(instr->length());
Operand length = ToOperand32(instr->length());
__ Cmp(index, length);
}
if (FLAG_debug_code && instr->hydrogen()->skip_check()) {
@ -2486,16 +2471,12 @@ void LCodeGen::DoCompareNumericAndBranch(LCompareNumericAndBranch* instr) {
} else {
if (instr->hydrogen_value()->representation().IsInteger32()) {
if (right->IsConstantOperand()) {
EmitCompareAndBranch(instr,
cond,
ToRegister32(left),
ToOperand32I(right));
EmitCompareAndBranch(instr, cond, ToRegister32(left),
ToOperand32(right));
} else {
// Commute the operands and the condition.
EmitCompareAndBranch(instr,
CommuteCondition(cond),
ToRegister32(right),
ToOperand32I(left));
EmitCompareAndBranch(instr, CommuteCondition(cond),
ToRegister32(right), ToOperand32(left));
}
} else {
DCHECK(instr->hydrogen_value()->representation().IsSmi());
@ -3017,7 +2998,7 @@ void LCodeGen::DoInnerAllocatedObject(LInnerAllocatedObject* instr) {
Register result = ToRegister(instr->result());
Register base = ToRegister(instr->base_object());
if (instr->offset()->IsConstantOperand()) {
__ Add(result, base, ToOperand32I(instr->offset()));
__ Add(result, base, ToOperand32(instr->offset()));
} else {
__ Add(result, base, Operand(ToRegister32(instr->offset()), SXTW));
}
@ -4220,7 +4201,7 @@ void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
if (instr->hydrogen()->representation().IsInteger32()) {
Register result = ToRegister32(instr->result());
Register left = ToRegister32(instr->left());
Operand right = ToOperand32I(instr->right());
Operand right = ToOperand32(instr->right());
__ Cmp(left, right);
__ Csel(result, left, right, (op == HMathMinMax::kMathMax) ? ge : le);
@ -5571,7 +5552,7 @@ void LCodeGen::DoSubI(LSubI* instr) {
bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
Register result = ToRegister32(instr->result());
Register left = ToRegister32(instr->left());
Operand right = ToShiftedRightOperand32I(instr->right(), instr);
Operand right = ToShiftedRightOperand32(instr->right(), instr);
if (can_overflow) {
__ Subs(result, left, right);

22
src/arm64/lithium-codegen-arm64.h
View File

@ -83,31 +83,17 @@ class LCodeGen: public LCodeGenBase {
enum IntegerSignedness { SIGNED_INT32, UNSIGNED_INT32 };
// Support for converting LOperands to assembler types.
// LOperand must be a register.
Register ToRegister(LOperand* op) const;
Register ToRegister32(LOperand* op) const;
Operand ToOperand(LOperand* op);
Operand ToOperand32I(LOperand* op);
Operand ToOperand32U(LOperand* op);
Operand ToOperand32(LOperand* op);
enum StackMode { kMustUseFramePointer, kCanUseStackPointer };
MemOperand ToMemOperand(LOperand* op,
StackMode stack_mode = kCanUseStackPointer) const;
Handle<Object> ToHandle(LConstantOperand* op) const;
template<class LI>
Operand ToShiftedRightOperand32I(LOperand* right,
LI* shift_info) {
return ToShiftedRightOperand32(right, shift_info, SIGNED_INT32);
}
template<class LI>
Operand ToShiftedRightOperand32U(LOperand* right,
LI* shift_info) {
return ToShiftedRightOperand32(right, shift_info, UNSIGNED_INT32);
}
template<class LI>
Operand ToShiftedRightOperand32(LOperand* right,
LI* shift_info,
IntegerSignedness signedness);
template <class LI>
Operand ToShiftedRightOperand32(LOperand* right, LI* shift_info);
int JSShiftAmountFromLConstant(LOperand* constant) {
return ToInteger32(LConstantOperand::cast(constant)) & 0x1f;
@ -158,8 +144,6 @@ class LCodeGen: public LCodeGenBase {
Register object,
Register index);
Operand ToOperand32(LOperand* op, IntegerSignedness signedness);
static Condition TokenToCondition(Token::Value op, bool is_unsigned);
void EmitGoto(int block);
void DoGap(LGap* instr);