[wasm-simd][liftoff] Implement v128.const
This implements v128.const for ia32, x64, arm, and arm64. Moves one of the test case under the correct header. Bug: v8:9909 Change-Id: I93eb179ac5fd0bc22e3dd5277f7d73699ac8b452 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2290623 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68806}
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@ -3267,7 +3267,10 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
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void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
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const uint8_t imms[16]) {
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bailout(kSimd, "s128.const");
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uint64_t vals[2];
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memcpy(vals, imms, sizeof(vals));
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vmov(dst.low_fp(), Double(vals[0]));
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vmov(dst.high_fp(), Double(vals[1]));
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}
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void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
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@ -2333,7 +2333,9 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
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void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
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const uint8_t imms[16]) {
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bailout(kSimd, "s128.const");
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uint64_t vals[2];
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memcpy(vals, imms, sizeof(vals));
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Movi(dst.fp().V16B(), vals[1], vals[0]);
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}
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void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
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@ -2827,7 +2827,17 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
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void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
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const uint8_t imms[16]) {
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bailout(kSimd, "s128.const");
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uint64_t vals[2];
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memcpy(vals, imms, sizeof(vals));
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TurboAssembler::Move(dst.fp(), vals[0]);
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uint64_t high = vals[1];
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Register tmp = GetUnusedRegister(RegClass::kGpReg, {}).gp();
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TurboAssembler::Move(tmp, Immediate(high & 0xffff'ffff));
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Pinsrd(dst.fp(), tmp, 2);
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TurboAssembler::Move(tmp, Immediate(high >> 32));
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Pinsrd(dst.fp(), tmp, 3);
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}
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void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
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@ -2549,7 +2549,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
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void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
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const uint8_t imms[16]) {
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bailout(kSimd, "s128.const");
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uint64_t vals[2];
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memcpy(vals, imms, sizeof(vals));
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TurboAssembler::Move(dst.fp(), vals[0]);
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movq(kScratchRegister, vals[1]);
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Pinsrq(dst.fp(), kScratchRegister, int8_t{1});
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}
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void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {
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@ -3695,6 +3695,15 @@ WASM_SIMD_TEST_NO_LOWERING(S128Const) {
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expected[i] = i;
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}
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RunSimdConstTest(execution_tier, lower_simd, expected);
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// Keep the first 4 lanes as 0, set the remaining ones.
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for (int i = 0; i < 0; i++) {
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expected[i] = 0;
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}
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for (int i = 4; i < kSimd128Size; i++) {
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expected[i] = i;
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}
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RunSimdConstTest(execution_tier, lower_simd, expected);
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}
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WASM_SIMD_TEST_NO_LOWERING(S128ConstAllZero) {
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@ -3704,12 +3713,6 @@ WASM_SIMD_TEST_NO_LOWERING(S128ConstAllZero) {
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expected[i] = 0;
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}
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RunSimdConstTest(execution_tier, lower_simd, expected);
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// Keep the first 4 lanes as 0, set the remaining ones.
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for (int i = 4; i < kSimd128Size; i++) {
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expected[i] = i;
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}
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RunSimdConstTest(execution_tier, lower_simd, expected);
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}
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WASM_SIMD_TEST_NO_LOWERING(S128ConstAllOnes) {
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