X64: replace explicit zero-extend with runtime assert

Since the input float64 is in the range of [0, 2^32-1], the upper 32 bits of output register
should be zero.

BUG=
R=bmeurer@chromium.org, titzer@chromium.org

Review URL: https://codereview.chromium.org/644993002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25027}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25027 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
bmeurer@chromium.org 2014-10-31 09:19:55 +00:00
parent 4a679c8288
commit dd1cb5281f

View File

@ -441,16 +441,15 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
}
break;
case kSSEFloat64ToUint32:
case kSSEFloat64ToUint32: {
if (instr->InputAt(0)->IsDoubleRegister()) {
__ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
} else {
__ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
}
__ andl(i.OutputRegister(), i.OutputRegister()); // clear upper bits.
// TODO(turbofan): generated code should not look at the upper 32 bits
// of the result, but those bits could escape to the outside world.
__ AssertZeroExtended(i.OutputRegister());
break;
}
case kSSEInt32ToFloat64:
if (instr->InputAt(0)->IsRegister()) {
__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));