X64: replace explicit zero-extend with runtime assert
Since the input float64 is in the range of [0, 2^32-1], the upper 32 bits of output register should be zero. BUG= R=bmeurer@chromium.org, titzer@chromium.org Review URL: https://codereview.chromium.org/644993002 Patch from Weiliang Lin <weiliang.lin@intel.com>. Cr-Commit-Position: refs/heads/master@{#25027} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25027 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -441,16 +441,15 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
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__ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kSSEFloat64ToUint32:
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case kSSEFloat64ToUint32: {
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if (instr->InputAt(0)->IsDoubleRegister()) {
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__ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
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} else {
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__ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
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}
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__ andl(i.OutputRegister(), i.OutputRegister()); // clear upper bits.
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// TODO(turbofan): generated code should not look at the upper 32 bits
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// of the result, but those bits could escape to the outside world.
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__ AssertZeroExtended(i.OutputRegister());
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break;
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}
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case kSSEInt32ToFloat64:
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if (instr->InputAt(0)->IsRegister()) {
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__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
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