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PPC/s390: [wasm-simd] Remove signselect

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Port 7c78ad8026

Original Commit Message:

    These were prototyped and not merged into the SIMD proposal.

R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: Ic6f604891908d0b4f1554951a57ef45e6e7d285e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2727655
Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#73106}
This commit is contained in:
Milad Fa 2021-03-01 16:00:40 +00:00 committed by Commit Bot
parent c546b42e29
commit dd268b4a3e
6 changed files with 0 additions and 68 deletions
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25
src/compiler/backend/ppc/code-generator-ppc.cc
View File

@ -3709,31 +3709,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputSimd128Register(1), kScratchSimd128Reg);
break;
}
#define SIGN_SELECT(compare_gt) \
Simd128Register src0 = i.InputSimd128Register(0); \
Simd128Register src1 = i.InputSimd128Register(1); \
Simd128Register src2 = i.InputSimd128Register(2); \
Simd128Register dst = i.OutputSimd128Register(); \
__ vxor(kScratchSimd128Reg, kScratchSimd128Reg, kScratchSimd128Reg); \
__ compare_gt(kScratchSimd128Reg, kScratchSimd128Reg, src2); \
__ vsel(dst, src1, src0, kScratchSimd128Reg);
case kPPC_I8x16SignSelect: {
SIGN_SELECT(vcmpgtsb)
break;
}
case kPPC_I16x8SignSelect: {
SIGN_SELECT(vcmpgtsh)
break;
}
case kPPC_I32x4SignSelect: {
SIGN_SELECT(vcmpgtsw)
break;
}
case kPPC_I64x2SignSelect: {
SIGN_SELECT(vcmpgtsd)
break;
}
#undef SIGN_SELECT
case kPPC_StoreCompressTagged: {
ASSEMBLE_STORE_INTEGER(StoreTaggedField, StoreTaggedFieldX);
break;

4
src/compiler/backend/ppc/instruction-codes-ppc.h
View File

@ -268,7 +268,6 @@ namespace compiler {
V(PPC_I64x2SConvertI32x4High) \
V(PPC_I64x2UConvertI32x4Low) \
V(PPC_I64x2UConvertI32x4High) \
V(PPC_I64x2SignSelect) \
V(PPC_I32x4Splat) \
V(PPC_I32x4ExtractLane) \
V(PPC_I32x4ReplaceLane) \
@ -301,7 +300,6 @@ namespace compiler {
V(PPC_I32x4DotI16x8S) \
V(PPC_I32x4ExtAddPairwiseI16x8S) \
V(PPC_I32x4ExtAddPairwiseI16x8U) \
V(PPC_I32x4SignSelect) \
V(PPC_F32x4Qfma) \
V(PPC_F32x4Qfms) \
V(PPC_I16x8Splat) \
@ -342,7 +340,6 @@ namespace compiler {
V(PPC_I16x8ExtAddPairwiseI8x16S) \
V(PPC_I16x8ExtAddPairwiseI8x16U) \
V(PPC_I16x8Q15MulRSatS) \
V(PPC_I16x8SignSelect) \
V(PPC_I8x16Splat) \
V(PPC_I8x16ExtractLaneU) \
V(PPC_I8x16ExtractLaneS) \
@ -374,7 +371,6 @@ namespace compiler {
V(PPC_I8x16Shuffle) \
V(PPC_I8x16Swizzle) \
V(PPC_I8x16BitMask) \
V(PPC_I8x16SignSelect) \
V(PPC_V64x2AllTrue) \
V(PPC_V32x4AllTrue) \
V(PPC_V16x8AllTrue) \

4
src/compiler/backend/ppc/instruction-scheduler-ppc.cc
View File

@ -193,7 +193,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_I64x2SConvertI32x4High:
case kPPC_I64x2UConvertI32x4Low:
case kPPC_I64x2UConvertI32x4High:
case kPPC_I64x2SignSelect:
case kPPC_I32x4Splat:
case kPPC_I32x4ExtractLane:
case kPPC_I32x4ReplaceLane:
@ -226,7 +225,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_I32x4DotI16x8S:
case kPPC_I32x4ExtAddPairwiseI16x8S:
case kPPC_I32x4ExtAddPairwiseI16x8U:
case kPPC_I32x4SignSelect:
case kPPC_I16x8Splat:
case kPPC_I16x8ExtractLaneU:
case kPPC_I16x8ExtractLaneS:
@ -265,7 +263,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_I16x8ExtAddPairwiseI8x16S:
case kPPC_I16x8ExtAddPairwiseI8x16U:
case kPPC_I16x8Q15MulRSatS:
case kPPC_I16x8SignSelect:
case kPPC_I8x16Splat:
case kPPC_I8x16ExtractLaneU:
case kPPC_I8x16ExtractLaneS:
@ -297,7 +294,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_I8x16Shuffle:
case kPPC_I8x16Swizzle:
case kPPC_I8x16BitMask:
case kPPC_I8x16SignSelect:
case kPPC_V64x2AllTrue:
case kPPC_V32x4AllTrue:
case kPPC_V16x8AllTrue:

27
src/compiler/backend/s390/code-generator-s390.cc
View File

@ -4011,33 +4011,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
#undef Q15_MUL_ROAUND
#define SIGN_SELECT(mode) \
Simd128Register src0 = i.InputSimd128Register(0); \
Simd128Register src1 = i.InputSimd128Register(1); \
Simd128Register src2 = i.InputSimd128Register(2); \
Simd128Register dst = i.OutputSimd128Register(); \
__ vx(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg, Condition(0), \
Condition(0), Condition(3)); \
__ vch(kScratchDoubleReg, kScratchDoubleReg, src2, Condition(0), \
Condition(mode)); \
__ vsel(dst, src0, src1, kScratchDoubleReg, Condition(0), Condition(0));
case kS390_I8x16SignSelect: {
SIGN_SELECT(0)
break;
}
case kS390_I16x8SignSelect: {
SIGN_SELECT(1)
break;
}
case kS390_I32x4SignSelect: {
SIGN_SELECT(2)
break;
}
case kS390_I64x2SignSelect: {
SIGN_SELECT(3)
break;
}
#undef SIGN_SELECT
case kS390_I8x16Popcnt: {
__ vpopct(i.OutputSimd128Register(), i.InputSimd128Register(0),
Condition(0), Condition(0), Condition(0));

4
src/compiler/backend/s390/instruction-codes-s390.h
View File

@ -267,7 +267,6 @@ namespace compiler {
V(S390_I64x2SConvertI32x4High) \
V(S390_I64x2UConvertI32x4Low) \
V(S390_I64x2UConvertI32x4High) \
V(S390_I64x2SignSelect) \
V(S390_I64x2Ne) \
V(S390_I64x2GtS) \
V(S390_I64x2GeS) \
@ -308,7 +307,6 @@ namespace compiler {
V(S390_I32x4ExtMulHighI16x8U) \
V(S390_I32x4ExtAddPairwiseI16x8S) \
V(S390_I32x4ExtAddPairwiseI16x8U) \
V(S390_I32x4SignSelect) \
V(S390_I32x4TruncSatF64x2SZero) \
V(S390_I32x4TruncSatF64x2UZero) \
V(S390_I16x8Splat) \
@ -353,7 +351,6 @@ namespace compiler {
V(S390_I16x8ExtAddPairwiseI8x16S) \
V(S390_I16x8ExtAddPairwiseI8x16U) \
V(S390_I16x8Q15MulRSatS) \
V(S390_I16x8SignSelect) \
V(S390_I8x16Splat) \
V(S390_I8x16ExtractLaneU) \
V(S390_I8x16ExtractLaneS) \
@ -385,7 +382,6 @@ namespace compiler {
V(S390_I8x16BitMask) \
V(S390_I8x16Shuffle) \
V(S390_I8x16Swizzle) \
V(S390_I8x16SignSelect) \
V(S390_I8x16Popcnt) \
V(S390_V64x2AllTrue) \
V(S390_V32x4AllTrue) \

4
src/compiler/backend/s390/instruction-scheduler-s390.cc
View File

@ -214,7 +214,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I64x2SConvertI32x4High:
case kS390_I64x2UConvertI32x4Low:
case kS390_I64x2UConvertI32x4High:
case kS390_I64x2SignSelect:
case kS390_I64x2Ne:
case kS390_I64x2GtS:
case kS390_I64x2GeS:
@ -255,7 +254,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I32x4ExtMulHighI16x8U:
case kS390_I32x4ExtAddPairwiseI16x8S:
case kS390_I32x4ExtAddPairwiseI16x8U:
case kS390_I32x4SignSelect:
case kS390_I32x4TruncSatF64x2SZero:
case kS390_I32x4TruncSatF64x2UZero:
case kS390_I16x8Splat:
@ -300,7 +298,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I16x8ExtAddPairwiseI8x16S:
case kS390_I16x8ExtAddPairwiseI8x16U:
case kS390_I16x8Q15MulRSatS:
case kS390_I16x8SignSelect:
case kS390_I8x16Splat:
case kS390_I8x16ExtractLaneU:
case kS390_I8x16ExtractLaneS:
@ -332,7 +329,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I8x16BitMask:
case kS390_I8x16Shuffle:
case kS390_I8x16Swizzle:
case kS390_I8x16SignSelect:
case kS390_I8x16Popcnt:
case kS390_V64x2AllTrue:
case kS390_V32x4AllTrue: