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Revert "[WASM SIMD] Store simd lowering compare ops result as -1 instead of 1"

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This reverts commit 2f83ffa99d.

Reason for revert: Bots failed after this landed. Need to figure out if it is related.

Original change's description:
> [WASM SIMD] Store simd lowering compare ops result as -1 instead of 1
> 
> BUG: v8:6020
> Change-Id: I3148511233ee6f89acd71644e0c43f72ccc5eef0
> Reviewed-on: https://chromium-review.googlesource.com/538160
> Reviewed-by: Bill Budge <bbudge@chromium.org>
> Reviewed-by: Mircea Trofin <mtrofin@chromium.org>
> Commit-Queue: Aseem Garg <aseemgarg@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#46071}

TBR=bbudge@chromium.org,gdeepti@chromium.org,mtrofin@chromium.org,aseemgarg@chromium.org

Change-Id: I300eadd02ab2d20817461e6f9a2c23c138b42256
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/541717
Reviewed-by: Aseem Garg <aseemgarg@chromium.org>
Commit-Queue: Aseem Garg <aseemgarg@chromium.org>
Cr-Commit-Position: refs/heads/master@{#46072}
This commit is contained in:
Aseem Garg 2017-06-20 21:06:32 +00:00 committed by Commit Bot
parent 2f83ffa99d
commit dddd2c696c
2 changed files with 142 additions and 91 deletions
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227
src/compiler/simd-scalar-lowering.cc
View File

@ -93,16 +93,6 @@ void SimdScalarLowering::LowerGraph() {
V(I32x4ShrU) \
V(I32x4MinU) \
V(I32x4MaxU) \
V(I32x4Eq) \
V(I32x4Ne) \
V(I32x4LtS) \
V(I32x4LeS) \
V(I32x4GtS) \
V(I32x4GeS) \
V(I32x4LtU) \
V(I32x4LeU) \
V(I32x4GtU) \
V(I32x4GeU) \
V(S128And) \
V(S128Or) \
V(S128Xor) \
@ -122,7 +112,7 @@ void SimdScalarLowering::LowerGraph() {
V(F32x4Min) \
V(F32x4Max)
#define FOREACH_FLOAT32X4_TO_INT32X4OPCODE(V) \
#define FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(V) \
V(F32x4Eq) \
V(F32x4Ne) \
V(F32x4Lt) \
@ -130,6 +120,18 @@ void SimdScalarLowering::LowerGraph() {
V(F32x4Gt) \
V(F32x4Ge)
#define FOREACH_INT32X4_TO_SIMD1X4OPCODE(V) \
V(I32x4Eq) \
V(I32x4Ne) \
V(I32x4LtS) \
V(I32x4LeS) \
V(I32x4GtS) \
V(I32x4GeS) \
V(I32x4LtU) \
V(I32x4LeU) \
V(I32x4GtU) \
V(I32x4GeU)
#define FOREACH_INT16X8_OPCODE(V) \
V(I16x8Splat) \
V(I16x8ExtractLane) \
@ -148,13 +150,7 @@ void SimdScalarLowering::LowerGraph() {
V(I16x8AddSaturateU) \
V(I16x8SubSaturateU) \
V(I16x8MinU) \
V(I16x8MaxU) \
V(I16x8Eq) \
V(I16x8Ne) \
V(I16x8LtS) \
V(I16x8LeS) \
V(I16x8LtU) \
V(I16x8LeU)
V(I16x8MaxU)
#define FOREACH_INT8X16_OPCODE(V) \
V(I8x16Splat) \
@ -174,27 +170,35 @@ void SimdScalarLowering::LowerGraph() {
V(I8x16AddSaturateU) \
V(I8x16SubSaturateU) \
V(I8x16MinU) \
V(I8x16MaxU) \
V(I8x16Eq) \
V(I8x16Ne) \
V(I8x16LtS) \
V(I8x16LeS) \
V(I8x16LtU) \
V(I8x16MaxU)
#define FOREACH_INT16X8_TO_SIMD1X8OPCODE(V) \
V(I16x8Eq) \
V(I16x8Ne) \
V(I16x8LtS) \
V(I16x8LeS) \
V(I16x8LtU) \
V(I16x8LeU)
#define FOREACH_INT8X16_TO_SIMD1X16OPCODE(V) \
V(I8x16Eq) \
V(I8x16Ne) \
V(I8x16LtS) \
V(I8x16LeS) \
V(I8x16LtU) \
V(I8x16LeU)
MachineType SimdScalarLowering::MachineTypeFrom(SimdType simdType) {
switch (simdType) {
case SimdType::kFloat32x4:
return MachineType::Float32();
case SimdType::kInt32x4:
return MachineType::Int32();
case SimdType::kInt16x8:
return MachineType::Int16();
case SimdType::kInt8x16:
return MachineType::Int8();
}
return MachineType::None();
}
#define FOREACH_SIMD_TYPE_TO_MACHINE_TYPE(V) \
V(Float32x4, Float32) \
V(Int32x4, Int32) \
V(Int16x8, Int16) \
V(Int8x16, Int8)
#define FOREACH_SIMD_TYPE_TO_MACHINE_REP(V) \
V(Float32x4, Float32) \
V(Int32x4, Word32) \
V(Int16x8, Word16) \
V(Int8x16, Word8)
void SimdScalarLowering::SetLoweredType(Node* node, Node* output) {
switch (node->opcode()) {
@ -210,7 +214,8 @@ void SimdScalarLowering::SetLoweredType(Node* node, Node* output) {
replacements_[node->id()].type = SimdType::kFloat32x4;
break;
}
FOREACH_FLOAT32X4_TO_INT32X4OPCODE(CASE_STMT) {
FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT)
FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt32x4;
break;
}
@ -218,18 +223,27 @@ void SimdScalarLowering::SetLoweredType(Node* node, Node* output) {
replacements_[node->id()].type = SimdType::kInt16x8;
break;
}
FOREACH_INT16X8_TO_SIMD1X8OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt16x8;
break;
}
FOREACH_INT8X16_OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt8x16;
break;
}
FOREACH_INT8X16_TO_SIMD1X16OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt8x16;
break;
}
default: {
switch (output->opcode()) {
FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT)
case IrOpcode::kF32x4SConvertI32x4:
case IrOpcode::kF32x4UConvertI32x4: {
replacements_[node->id()].type = SimdType::kInt32x4;
break;
}
FOREACH_FLOAT32X4_TO_INT32X4OPCODE(CASE_STMT)
FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT)
case IrOpcode::kI32x4SConvertF32x4:
case IrOpcode::kI32x4UConvertF32x4: {
replacements_[node->id()].type = SimdType::kFloat32x4;
@ -239,6 +253,14 @@ void SimdScalarLowering::SetLoweredType(Node* node, Node* output) {
replacements_[node->id()].type = SimdType::kInt32x4;
break;
}
FOREACH_INT16X8_TO_SIMD1X8OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt16x8;
break;
}
FOREACH_INT8X16_TO_SIMD1X16OPCODE(CASE_STMT) {
replacements_[node->id()].type = SimdType::kInt8x16;
break;
}
default: {
replacements_[node->id()].type = replacements_[output->id()].type;
}
@ -388,42 +410,18 @@ void SimdScalarLowering::LowerStoreOp(MachineRepresentation rep, Node* node,
}
void SimdScalarLowering::LowerBinaryOp(Node* node, SimdType input_rep_type,
const Operator* op) {
const Operator* op, bool invert_inputs) {
DCHECK(node->InputCount() == 2);
Node** rep_left = GetReplacementsWithType(node->InputAt(0), input_rep_type);
Node** rep_right = GetReplacementsWithType(node->InputAt(1), input_rep_type);
int num_lanes = NumLanes(input_rep_type);
Node** rep_node = zone()->NewArray<Node*>(num_lanes);
for (int i = 0; i < num_lanes; ++i) {
rep_node[i] = graph()->NewNode(op, rep_left[i], rep_right[i]);
}
ReplaceNode(node, rep_node, num_lanes);
}
void SimdScalarLowering::LowerCompareOp(Node* node, SimdType input_rep_type,
const Operator* op,
bool invert_inputs) {
DCHECK(node->InputCount() == 2);
Node** rep_left = GetReplacementsWithType(node->InputAt(0), input_rep_type);
Node** rep_right = GetReplacementsWithType(node->InputAt(1), input_rep_type);
int num_lanes = NumLanes(input_rep_type);
Node** rep_node = zone()->NewArray<Node*>(num_lanes);
for (int i = 0; i < num_lanes; ++i) {
Node* cmp_result = nullptr;
if (invert_inputs) {
cmp_result = graph()->NewNode(op, rep_right[i], rep_left[i]);
rep_node[i] = graph()->NewNode(op, rep_right[i], rep_left[i]);
} else {
cmp_result = graph()->NewNode(op, rep_left[i], rep_right[i]);
rep_node[i] = graph()->NewNode(op, rep_left[i], rep_right[i]);
}
Diamond d_cmp(graph(), common(),
graph()->NewNode(machine()->Word32Equal(), cmp_result,
jsgraph_->Int32Constant(0)));
MachineRepresentation rep =
(input_rep_type == SimdType::kFloat32x4)
? MachineRepresentation::kWord32
: MachineTypeFrom(input_rep_type).representation();
rep_node[i] =
d_cmp.Phi(rep, jsgraph_->Int32Constant(0), jsgraph_->Int32Constant(-1));
}
ReplaceNode(node, rep_node, num_lanes);
}
@ -679,12 +677,8 @@ void SimdScalarLowering::LowerNotEqual(Node* node, SimdType input_rep_type,
for (int i = 0; i < num_lanes; ++i) {
Diamond d(graph(), common(),
graph()->NewNode(op, rep_left[i], rep_right[i]));
MachineRepresentation rep =
(input_rep_type == SimdType::kFloat32x4)
? MachineRepresentation::kWord32
: MachineTypeFrom(input_rep_type).representation();
rep_node[i] =
d.Phi(rep, jsgraph_->Int32Constant(0), jsgraph_->Int32Constant(-1));
rep_node[i] = d.Phi(MachineRepresentation::kWord32,
jsgraph_->Int32Constant(0), jsgraph_->Int32Constant(1));
}
ReplaceNode(node, rep_node, num_lanes);
}
@ -738,7 +732,17 @@ void SimdScalarLowering::LowerNode(Node* node) {
MachineRepresentation rep =
LoadRepresentationOf(node->op()).representation();
const Operator* load_op;
load_op = machine()->Load(MachineTypeFrom(rep_type));
#define LOAD_CASE(sType, mType) \
case SimdType::k##sType: \
load_op = machine()->Load(MachineType::mType()); \
break;
switch (rep_type) {
FOREACH_SIMD_TYPE_TO_MACHINE_TYPE(LOAD_CASE)
default:
UNREACHABLE();
}
#undef LOAD_CASE
LowerLoadOp(rep, node, load_op, rep_type);
break;
}
@ -746,7 +750,17 @@ void SimdScalarLowering::LowerNode(Node* node) {
MachineRepresentation rep =
UnalignedLoadRepresentationOf(node->op()).representation();
const Operator* load_op;
load_op = machine()->UnalignedLoad(MachineTypeFrom(rep_type));
#define UNALIGNED_LOAD_CASE(sType, mType) \
case SimdType::k##sType: \
load_op = machine()->UnalignedLoad(MachineType::mType()); \
break;
switch (rep_type) {
FOREACH_SIMD_TYPE_TO_MACHINE_TYPE(UNALIGNED_LOAD_CASE)
default:
UNREACHABLE();
}
#undef UNALIGHNED_LOAD_CASE
LowerLoadOp(rep, node, load_op, rep_type);
break;
}
@ -756,16 +770,35 @@ void SimdScalarLowering::LowerNode(Node* node) {
WriteBarrierKind write_barrier_kind =
StoreRepresentationOf(node->op()).write_barrier_kind();
const Operator* store_op;
store_op = machine()->Store(StoreRepresentation(
MachineTypeFrom(rep_type).representation(), write_barrier_kind));
#define STORE_CASE(sType, mType) \
case SimdType::k##sType: \
store_op = machine()->Store(StoreRepresentation( \
MachineRepresentation::k##mType, write_barrier_kind)); \
break;
switch (rep_type) {
FOREACH_SIMD_TYPE_TO_MACHINE_REP(STORE_CASE)
default:
UNREACHABLE();
}
#undef STORE_CASE
LowerStoreOp(rep, node, store_op, rep_type);
break;
}
case IrOpcode::kUnalignedStore: {
MachineRepresentation rep = UnalignedStoreRepresentationOf(node->op());
const Operator* store_op;
store_op =
machine()->UnalignedStore(MachineTypeFrom(rep_type).representation());
#define UNALIGNED_STORE_CASE(sType, mType) \
case SimdType::k##sType: \
store_op = machine()->UnalignedStore(MachineRepresentation::k##mType); \
break;
switch (rep_type) {
FOREACH_SIMD_TYPE_TO_MACHINE_REP(UNALIGNED_STORE_CASE)
default:
UNREACHABLE();
}
#undef UNALIGNED_STORE_CASE
LowerStoreOp(rep, node, store_op, rep_type);
break;
}
@ -1012,10 +1045,10 @@ void SimdScalarLowering::LowerNode(Node* node) {
ReplaceNode(node, rep_node, num_lanes);
break;
}
#define COMPARISON_CASE(type, simd_op, lowering_op, invert) \
case IrOpcode::simd_op: { \
LowerCompareOp(node, SimdType::k##type, machine()->lowering_op(), invert); \
break; \
#define COMPARISON_CASE(type, simd_op, lowering_op, invert) \
case IrOpcode::simd_op: { \
LowerBinaryOp(node, SimdType::k##type, machine()->lowering_op(), invert); \
break; \
}
COMPARISON_CASE(Float32x4, kF32x4Eq, Float32Equal, false)
COMPARISON_CASE(Float32x4, kF32x4Lt, Float32LessThan, false)
@ -1079,8 +1112,18 @@ void SimdScalarLowering::LowerNode(Node* node) {
Diamond d(graph(), common(),
graph()->NewNode(machine()->Word32Equal(), boolean_input[i],
jsgraph_->Int32Constant(0)));
rep_node[i] = d.Phi(MachineTypeFrom(rep_type).representation(),
rep_right[1], rep_left[0]);
#define SELECT_CASE(sType, mType) \
case SimdType::k##sType: \
rep_node[i] = \
d.Phi(MachineRepresentation::k##mType, rep_right[1], rep_left[0]); \
break;
switch (rep_type) {
FOREACH_SIMD_TYPE_TO_MACHINE_REP(SELECT_CASE)
default:
UNREACHABLE();
}
#undef SELECT_CASE
}
ReplaceNode(node, rep_node, num_lanes);
break;
@ -1214,9 +1257,19 @@ void SimdScalarLowering::PreparePhiReplacement(Node* phi) {
}
Node** rep_nodes = zone()->NewArray<Node*>(num_lanes);
for (int i = 0; i < num_lanes; ++i) {
rep_nodes[i] = graph()->NewNode(
common()->Phi(MachineTypeFrom(type).representation(), value_count),
value_count + 1, inputs_rep[i], false);
#define PHI_CASE(sType, mType) \
case SimdType::k##sType: \
rep_nodes[i] = graph()->NewNode( \
common()->Phi(MachineRepresentation::k##mType, value_count), \
value_count + 1, inputs_rep[i], false); \
break;
switch (type) {
FOREACH_SIMD_TYPE_TO_MACHINE_REP(PHI_CASE)
default:
UNREACHABLE();
}
#undef PHI_CASE
}
ReplaceNode(phi, rep_nodes, num_lanes);
}

6
src/compiler/simd-scalar-lowering.h
View File

@ -73,9 +73,8 @@ class SimdScalarLowering {
const Operator* load_op, SimdType type);
void LowerStoreOp(MachineRepresentation rep, Node* node,
const Operator* store_op, SimdType rep_type);
void LowerBinaryOp(Node* node, SimdType input_rep_type, const Operator* op);
void LowerCompareOp(Node* node, SimdType input_rep_type, const Operator* op,
bool invert_inputs = false);
void LowerBinaryOp(Node* node, SimdType input_rep_type, const Operator* op,
bool invert_inputs = false);
Node* FixUpperBits(Node* input, int32_t shift);
void LowerBinaryOpForSmallInt(Node* node, SimdType input_rep_type,
const Operator* op);
@ -89,7 +88,6 @@ class SimdScalarLowering {
void LowerShiftOp(Node* node, SimdType type);
Node* BuildF64Trunc(Node* input);
void LowerNotEqual(Node* node, SimdType input_rep_type, const Operator* op);
MachineType MachineTypeFrom(SimdType simdType);
JSGraph* const jsgraph_;
NodeMarker<State> state_;