[test] Move cctest/test-disasm-arm64 to unittests/assembler/

... disasm-arm64-unittest.

Bug: v8:12781
Change-Id: I4278eb39e9521bc49b280b22a681f6eb270b80d4
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3675901
Reviewed-by: Leszek Swirski <leszeks@chromium.org>
Commit-Queue: 王澳 <wangao.james@bytedance.com>
Cr-Commit-Position: refs/heads/main@{#80798}
This commit is contained in:
jameslahm 2022-05-30 11:07:53 +08:00 committed by V8 LUCI CQ
parent 26cb6b92ef
commit dec69f8d07
3 changed files with 113 additions and 187 deletions

View File

@ -270,7 +270,6 @@ v8_source_set("cctest_sources") {
} else if (v8_current_cpu == "arm64") {
sources += [ ### gcmole(arch:arm64) ###
"test-assembler-arm64.cc",
"test-disasm-arm64.cc",
"test-fuzz-arm64.cc",
"test-javascript-arm64.cc",
"test-js-arm64-variables.cc",

View File

@ -496,6 +496,7 @@ v8_source_set("unittests_sources") {
]
} else if (v8_current_cpu == "arm64") {
sources += [
"assembler/disasm-arm64-unittest.cc",
"assembler/turbo-assembler-arm64-unittest.cc",
"compiler/arm64/instruction-selector-arm64-unittest.cc",
]

View File

@ -25,43 +25,42 @@
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "src/diagnostics/arm64/disasm-arm64.h"
#include <stdio.h>
#include <cstring>
#include "src/codegen/arm64/assembler-arm64.h"
#include "src/codegen/arm64/decoder-arm64-inl.h"
#include "src/codegen/arm64/utils-arm64.h"
#include "src/codegen/macro-assembler-inl.h"
#include "src/diagnostics/arm64/disasm-arm64.h"
#include "src/execution/frames-inl.h"
#include "src/init/v8.h"
#include "test/cctest/cctest.h"
#include "test/unittests/test-utils.h"
#include "testing/gtest/include/gtest/gtest.h"
namespace v8 {
namespace internal {
#define TEST_(name) TEST(DISASM_##name)
using DisasmArm64Test = TestWithIsolate;
#define EXP_SIZE (256)
#define EXP_SIZE (256)
#define INSTR_SIZE (1024)
#define SET_UP_MASM() \
InitializeVM(); \
Isolate* isolate = CcTest::i_isolate(); \
HandleScope scope(isolate); \
byte* buf = static_cast<byte*>(malloc(INSTR_SIZE)); \
uint32_t encoding = 0; \
MacroAssembler* assm = \
new MacroAssembler(isolate, v8::internal::CodeObjectRequired::kYes, \
ExternalAssemblerBuffer(buf, INSTR_SIZE)); \
Decoder<DispatchingDecoderVisitor>* decoder = \
new Decoder<DispatchingDecoderVisitor>(); \
DisassemblingDecoder* disasm = new DisassemblingDecoder(); \
#define SET_UP_MASM() \
HandleScope scope(isolate()); \
byte* buf = static_cast<byte*>(malloc(INSTR_SIZE)); \
uint32_t encoding = 0; \
MacroAssembler* assm = \
new MacroAssembler((isolate()), v8::internal::CodeObjectRequired::kYes, \
ExternalAssemblerBuffer(buf, INSTR_SIZE)); \
Decoder<DispatchingDecoderVisitor>* decoder = \
new Decoder<DispatchingDecoderVisitor>(); \
DisassemblingDecoder* disasm = new DisassemblingDecoder(); \
decoder->AppendVisitor(disasm)
#define SET_UP_ASM() \
InitializeVM(); \
Isolate* isolate = CcTest::i_isolate(); \
HandleScope scope(isolate); \
HandleScope scope(isolate()); \
byte* buf = static_cast<byte*>(malloc(INSTR_SIZE)); \
uint32_t encoding = 0; \
Assembler* assm = new Assembler(AssemblerOptions{}, \
@ -76,7 +75,7 @@ namespace internal {
assm->ASM; \
{ \
CodeDesc desc; \
assm->GetCode(isolate, &desc); \
assm->GetCode(isolate(), &desc); \
} \
decoder->Decode(reinterpret_cast<Instruction*>(buf)); \
encoding = *reinterpret_cast<uint32_t*>(buf); \
@ -91,7 +90,7 @@ namespace internal {
assm->ASM; \
{ \
CodeDesc desc; \
assm->GetCode(isolate, &desc); \
assm->GetCode(isolate(), &desc); \
} \
decoder->Decode(reinterpret_cast<Instruction*>(buf)); \
encoding = *reinterpret_cast<uint32_t*>(buf); \
@ -107,19 +106,7 @@ namespace internal {
delete assm; \
free(buf)
static bool vm_initialized = false;
static void InitializeVM() {
if (!vm_initialized) {
CcTest::InitializeVM();
vm_initialized = true;
}
}
TEST_(bootstrap) {
TEST_F(DisasmArm64Test, bootstrap) {
SET_UP_ASM();
// Instructions generated by C compiler, disassembled by objdump, and
@ -148,8 +135,7 @@ TEST_(bootstrap) {
CLEANUP();
}
TEST_(mov_mvn) {
TEST_F(DisasmArm64Test, mov_mvn) {
SET_UP_MASM();
COMPARE(Mov(w0, Operand(0x1234)), "movz w0, #0x1234");
@ -182,8 +168,7 @@ TEST_(mov_mvn) {
CLEANUP();
}
TEST_(move_immediate) {
TEST_F(DisasmArm64Test, move_immediate) {
SET_UP_ASM();
COMPARE(movz(w0, 0x1234), "movz w0, #0x1234");
@ -219,8 +204,7 @@ TEST_(move_immediate) {
CLEANUP();
}
TEST(move_immediate_2) {
TEST_F(DisasmArm64Test, move_immediate_2) {
SET_UP_MASM();
// Move instructions expected for certain immediates. This is really a macro
@ -275,8 +259,7 @@ TEST(move_immediate_2) {
CLEANUP();
}
TEST_(add_immediate) {
TEST_F(DisasmArm64Test, add_immediate) {
SET_UP_ASM();
COMPARE(add(w0, w1, Operand(0xff)), "add w0, w1, #0xff (255)");
@ -289,8 +272,7 @@ TEST_(add_immediate) {
COMPARE(add(w12, w13, Operand(0xfff000)),
"add w12, w13, #0xfff000 (16773120)");
COMPARE(adds(w14, w15, Operand(0xff)), "adds w14, w15, #0xff (255)");
COMPARE(adds(x16, x17, Operand(0xaa000)),
"adds x16, x17, #0xaa000 (696320)");
COMPARE(adds(x16, x17, Operand(0xaa000)), "adds x16, x17, #0xaa000 (696320)");
COMPARE(cmn(w18, Operand(0xff)), "cmn w18, #0xff (255)");
COMPARE(cmn(x19, Operand(0xff000)), "cmn x19, #0xff000 (1044480)");
COMPARE(add(w0, wsp, Operand(0)), "mov w0, wsp");
@ -305,8 +287,7 @@ TEST_(add_immediate) {
CLEANUP();
}
TEST_(sub_immediate) {
TEST_F(DisasmArm64Test, sub_immediate) {
SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(0xff)), "sub w0, w1, #0xff (255)");
@ -319,8 +300,7 @@ TEST_(sub_immediate) {
COMPARE(sub(w12, w13, Operand(0xfff000)),
"sub w12, w13, #0xfff000 (16773120)");
COMPARE(subs(w14, w15, Operand(0xff)), "subs w14, w15, #0xff (255)");
COMPARE(subs(x16, x17, Operand(0xaa000)),
"subs x16, x17, #0xaa000 (696320)");
COMPARE(subs(x16, x17, Operand(0xaa000)), "subs x16, x17, #0xaa000 (696320)");
COMPARE(cmp(w18, Operand(0xff)), "cmp w18, #0xff (255)");
COMPARE(cmp(x19, Operand(0xff000)), "cmp x19, #0xff000 (1044480)");
@ -333,8 +313,7 @@ TEST_(sub_immediate) {
CLEANUP();
}
TEST_(add_shifted) {
TEST_F(DisasmArm64Test, add_shifted) {
SET_UP_ASM();
COMPARE(add(w0, w1, Operand(w2)), "add w0, w1, w2");
@ -359,8 +338,7 @@ TEST_(add_shifted) {
CLEANUP();
}
TEST_(sub_shifted) {
TEST_F(DisasmArm64Test, sub_shifted) {
SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(w2)), "sub w0, w1, w2");
@ -389,8 +367,7 @@ TEST_(sub_shifted) {
CLEANUP();
}
TEST_(add_extended) {
TEST_F(DisasmArm64Test, add_extended) {
SET_UP_ASM();
COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
@ -415,8 +392,7 @@ TEST_(add_extended) {
CLEANUP();
}
TEST_(sub_extended) {
TEST_F(DisasmArm64Test, sub_extended) {
SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(w2, UXTB)), "sub w0, w1, w2, uxtb");
@ -441,8 +417,7 @@ TEST_(sub_extended) {
CLEANUP();
}
TEST_(adc_subc_ngc) {
TEST_F(DisasmArm64Test, adc_subc_ngc) {
SET_UP_ASM();
COMPARE(adc(w0, w1, Operand(w2)), "adc w0, w1, w2");
@ -461,8 +436,7 @@ TEST_(adc_subc_ngc) {
CLEANUP();
}
TEST_(mul_and_div) {
TEST_F(DisasmArm64Test, mul_and_div) {
SET_UP_ASM();
COMPARE(mul(w0, w1, w2), "mul w0, w1, w2");
@ -494,8 +468,7 @@ TEST_(mul_and_div) {
CLEANUP();
}
TEST(maddl_msubl) {
TEST_F(DisasmArm64Test, maddl_msubl) {
SET_UP_ASM();
COMPARE(smaddl(x0, w1, w2, x3), "smaddl x0, w1, w2, x3");
@ -511,8 +484,7 @@ TEST(maddl_msubl) {
CLEANUP();
}
TEST_(dp_1_source) {
TEST_F(DisasmArm64Test, dp_1_source) {
SET_UP_ASM();
COMPARE(rbit(w0, w1), "rbit w0, w1");
@ -530,8 +502,7 @@ TEST_(dp_1_source) {
CLEANUP();
}
TEST_(bitfield) {
TEST_F(DisasmArm64Test, bitfield) {
SET_UP_ASM();
COMPARE(sxtb(w0, w1), "sxtb w0, w1");
@ -572,8 +543,7 @@ TEST_(bitfield) {
CLEANUP();
}
TEST_(extract) {
TEST_F(DisasmArm64Test, extract) {
SET_UP_ASM();
COMPARE(extr(w0, w1, w2, 0), "extr w0, w1, w2, #0");
@ -586,10 +556,9 @@ TEST_(extract) {
CLEANUP();
}
TEST_(logical_immediate) {
TEST_F(DisasmArm64Test, logical_immediate) {
SET_UP_ASM();
#define RESULT_SIZE (256)
#define RESULT_SIZE (256)
char result[RESULT_SIZE];
@ -653,33 +622,25 @@ TEST_(logical_immediate) {
"and w0, w0, #0x55555555"); // 2-bit pattern.
// Test other instructions.
COMPARE(tst(w1, Operand(0x11111111)),
"tst w1, #0x11111111");
COMPARE(tst(x2, Operand(0x8888888888888888L)),
"tst x2, #0x8888888888888888");
COMPARE(orr(w7, w8, Operand(0xaaaaaaaa)),
"orr w7, w8, #0xaaaaaaaa");
COMPARE(tst(w1, Operand(0x11111111)), "tst w1, #0x11111111");
COMPARE(tst(x2, Operand(0x8888888888888888L)), "tst x2, #0x8888888888888888");
COMPARE(orr(w7, w8, Operand(0xaaaaaaaa)), "orr w7, w8, #0xaaaaaaaa");
COMPARE(orr(x9, x10, Operand(0x5555555555555555L)),
"orr x9, x10, #0x5555555555555555");
COMPARE(eor(w15, w16, Operand(0x00000001)),
"eor w15, w16, #0x1");
COMPARE(eor(x17, x18, Operand(0x0000000000000003L)),
"eor x17, x18, #0x3");
COMPARE(eor(w15, w16, Operand(0x00000001)), "eor w15, w16, #0x1");
COMPARE(eor(x17, x18, Operand(0x0000000000000003L)), "eor x17, x18, #0x3");
COMPARE(ands(w23, w24, Operand(0x0000000f)), "ands w23, w24, #0xf");
COMPARE(ands(x25, x26, Operand(0x800000000000000fL)),
"ands x25, x26, #0x800000000000000f");
// Test inverse.
COMPARE(bic(w3, w4, Operand(0x20202020)),
"and w3, w4, #0xdfdfdfdf");
COMPARE(bic(w3, w4, Operand(0x20202020)), "and w3, w4, #0xdfdfdfdf");
COMPARE(bic(x5, x6, Operand(0x4040404040404040L)),
"and x5, x6, #0xbfbfbfbfbfbfbfbf");
COMPARE(orn(w11, w12, Operand(0x40004000)),
"orr w11, w12, #0xbfffbfff");
COMPARE(orn(w11, w12, Operand(0x40004000)), "orr w11, w12, #0xbfffbfff");
COMPARE(orn(x13, x14, Operand(0x8181818181818181L)),
"orr x13, x14, #0x7e7e7e7e7e7e7e7e");
COMPARE(eon(w19, w20, Operand(0x80000001)),
"eor w19, w20, #0x7ffffffe");
COMPARE(eon(w19, w20, Operand(0x80000001)), "eor w19, w20, #0x7ffffffe");
COMPARE(eon(x21, x22, Operand(0xc000000000000003L)),
"eor x21, x22, #0x3ffffffffffffffc");
COMPARE(bics(w27, w28, Operand(0xfffffff7)), "ands w27, w28, #0x8");
@ -712,8 +673,7 @@ TEST_(logical_immediate) {
CLEANUP();
}
TEST_(logical_shifted) {
TEST_F(DisasmArm64Test, logical_shifted) {
SET_UP_ASM();
COMPARE(and_(w0, w1, Operand(w2)), "and w0, w1, w2");
@ -782,8 +742,7 @@ TEST_(logical_shifted) {
CLEANUP();
}
TEST_(dp_2_source) {
TEST_F(DisasmArm64Test, dp_2_source) {
SET_UP_ASM();
COMPARE(lslv(w0, w1, w2), "lsl w0, w1, w2");
@ -798,8 +757,7 @@ TEST_(dp_2_source) {
CLEANUP();
}
TEST_(adr) {
TEST_F(DisasmArm64Test, adr) {
SET_UP_ASM();
char expected[100];
@ -821,8 +779,7 @@ TEST_(adr) {
CLEANUP();
}
TEST_(branch) {
TEST_F(DisasmArm64Test, branch) {
SET_UP_ASM();
#define INST_OFF(x) ((x) >> kInstrSizeLog2)
@ -859,8 +816,7 @@ TEST_(branch) {
CLEANUP();
}
TEST_(load_store) {
TEST_F(DisasmArm64Test, load_store) {
SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1)), "ldr w0, [x1]");
@ -915,8 +871,7 @@ TEST_(load_store) {
CLEANUP();
}
TEST_(load_store_regoffset) {
TEST_F(DisasmArm64Test, load_store_regoffset) {
SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1, w2, UXTW)), "ldr w0, [x1, w2, uxtw]");
@ -999,8 +954,7 @@ TEST_(load_store_regoffset) {
CLEANUP();
}
TEST_(load_store_byte) {
TEST_F(DisasmArm64Test, load_store_byte) {
SET_UP_ASM();
COMPARE(ldrb(w0, MemOperand(x1)), "ldrb w0, [x1]");
@ -1018,8 +972,7 @@ TEST_(load_store_byte) {
COMPARE(strb(w22, MemOperand(x23, -256, PreIndex)),
"strb w22, [x23, #-256]!");
COMPARE(strb(w24, MemOperand(x25, 255, PostIndex)), "strb w24, [x25], #255");
COMPARE(strb(w26, MemOperand(cp, -256, PostIndex)),
"strb w26, [cp], #-256");
COMPARE(strb(w26, MemOperand(cp, -256, PostIndex)), "strb w26, [cp], #-256");
COMPARE(ldrb(w28, MemOperand(x28, 3, PostIndex)), "ldrb w28, [x28], #3");
COMPARE(strb(fp, MemOperand(x28, -42, PreIndex)), "strb w29, [x28, #-42]!");
COMPARE(ldrsb(w0, MemOperand(x1)), "ldrsb w0, [x1]");
@ -1030,8 +983,7 @@ TEST_(load_store_byte) {
CLEANUP();
}
TEST_(load_store_half) {
TEST_F(DisasmArm64Test, load_store_half) {
SET_UP_ASM();
COMPARE(ldrh(w0, MemOperand(x1)), "ldrh w0, [x1]");
@ -1049,8 +1001,7 @@ TEST_(load_store_half) {
COMPARE(strh(w22, MemOperand(x23, -256, PreIndex)),
"strh w22, [x23, #-256]!");
COMPARE(strh(w24, MemOperand(x25, 255, PostIndex)), "strh w24, [x25], #255");
COMPARE(strh(w26, MemOperand(cp, -256, PostIndex)),
"strh w26, [cp], #-256");
COMPARE(strh(w26, MemOperand(cp, -256, PostIndex)), "strh w26, [cp], #-256");
COMPARE(ldrh(w28, MemOperand(x28, 3, PostIndex)), "ldrh w28, [x28], #3");
COMPARE(strh(fp, MemOperand(x28, -42, PreIndex)), "strh w29, [x28, #-42]!");
COMPARE(ldrh(w30, MemOperand(x0, 255)), "ldurh w30, [x0, #255]");
@ -1065,7 +1016,7 @@ TEST_(load_store_half) {
CLEANUP();
}
TEST(load_store_v_offset) {
TEST_F(DisasmArm64Test, load_store_v_offset) {
SET_UP_ASM();
COMPARE(ldr(s0, MemOperand(x1)), "ldr s0, [x1]");
@ -1109,7 +1060,7 @@ TEST(load_store_v_offset) {
CLEANUP();
}
TEST(load_store_v_pre) {
TEST_F(DisasmArm64Test, load_store_v_pre) {
SET_UP_ASM();
COMPARE(ldr(s0, MemOperand(x1, 4, PreIndex)), "ldr s0, [x1, #4]!");
@ -1155,7 +1106,7 @@ TEST(load_store_v_pre) {
CLEANUP();
}
TEST(load_store_v_post) {
TEST_F(DisasmArm64Test, load_store_v_post) {
SET_UP_ASM();
COMPARE(ldr(s0, MemOperand(x1, 4, PostIndex)), "ldr s0, [x1], #4");
@ -1201,7 +1152,7 @@ TEST(load_store_v_post) {
CLEANUP();
}
TEST(load_store_v_regoffset) {
TEST_F(DisasmArm64Test, load_store_v_regoffset) {
SET_UP_ASM();
COMPARE(ldr(b0, MemOperand(x1, x2)), "ldr b0, [x1, x2]");
@ -1295,8 +1246,7 @@ TEST(load_store_v_regoffset) {
CLEANUP();
}
TEST_(load_store_unscaled) {
TEST_F(DisasmArm64Test, load_store_unscaled) {
SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1, 1)), "ldur w0, [x1, #1]");
@ -1339,8 +1289,7 @@ TEST_(load_store_unscaled) {
CLEANUP();
}
TEST_(load_store_pair) {
TEST_F(DisasmArm64Test, load_store_pair) {
SET_UP_ASM();
COMPARE(ldp(w0, w1, MemOperand(x2)), "ldp w0, w1, [x2]");
@ -1471,7 +1420,7 @@ TEST_(load_store_pair) {
CLEANUP();
}
TEST_(load_store_acquire_release) {
TEST_F(DisasmArm64Test, load_store_acquire_release) {
SET_UP_MASM();
COMPARE(ldar(w0, x1), "ldar w0, [x1]");
@ -1503,7 +1452,7 @@ TEST_(load_store_acquire_release) {
CLEANUP();
}
TEST_(load_literal) {
TEST_F(DisasmArm64Test, load_literal) {
SET_UP_ASM();
COMPARE_PREFIX(ldr_pcrel(x10, 0), "ldr x10, pc+0");
@ -1518,7 +1467,7 @@ TEST_(load_literal) {
CLEANUP();
}
TEST_(cond_select) {
TEST_F(DisasmArm64Test, cond_select) {
SET_UP_ASM();
COMPARE(csel(w0, w1, w2, eq), "csel w0, w1, w2, eq");
@ -1552,8 +1501,7 @@ TEST_(cond_select) {
CLEANUP();
}
TEST(cond_select_macro) {
TEST_F(DisasmArm64Test, cond_select_macro) {
SET_UP_MASM();
COMPARE(Csel(w0, w1, -1, eq), "csinv w0, w1, wzr, eq");
@ -1566,8 +1514,7 @@ TEST(cond_select_macro) {
CLEANUP();
}
TEST_(cond_cmp) {
TEST_F(DisasmArm64Test, cond_cmp) {
SET_UP_ASM();
COMPARE(ccmn(w0, w1, NZCVFlag, eq), "ccmn w0, w1, #NZCV, eq");
@ -1584,8 +1531,7 @@ TEST_(cond_cmp) {
CLEANUP();
}
TEST_(cond_cmp_macro) {
TEST_F(DisasmArm64Test, cond_cmp_macro) {
SET_UP_MASM();
COMPARE(Ccmp(w0, -1, VFlag, hi), "ccmn w0, #1, #nzcV, hi");
@ -1596,8 +1542,7 @@ TEST_(cond_cmp_macro) {
CLEANUP();
}
TEST_(fmov_imm) {
TEST_F(DisasmArm64Test, fmov_imm) {
SET_UP_ASM();
COMPARE(fmov(s0, 1.0f), "fmov s0, #0x70 (1.0000)");
@ -1608,8 +1553,7 @@ TEST_(fmov_imm) {
CLEANUP();
}
TEST_(fmov_reg) {
TEST_F(DisasmArm64Test, fmov_reg) {
SET_UP_ASM();
COMPARE(fmov(w3, s13), "fmov w3, s13");
@ -1624,8 +1568,7 @@ TEST_(fmov_reg) {
CLEANUP();
}
TEST_(fp_dp1) {
TEST_F(DisasmArm64Test, fp_dp1) {
SET_UP_ASM();
COMPARE(fabs(s0, s1), "fabs s0, s1");
@ -1679,8 +1622,7 @@ TEST_(fp_dp1) {
CLEANUP();
}
TEST_(fp_dp2) {
TEST_F(DisasmArm64Test, fp_dp2) {
SET_UP_ASM();
COMPARE(fadd(s0, s1, s2), "fadd s0, s1, s2");
@ -1705,8 +1647,7 @@ TEST_(fp_dp2) {
CLEANUP();
}
TEST(fp_dp3) {
TEST_F(DisasmArm64Test, fp_dp3) {
SET_UP_ASM();
COMPARE(fmadd(s7, s8, s9, s10), "fmadd s7, s8, s9, s10");
@ -1722,8 +1663,7 @@ TEST(fp_dp3) {
CLEANUP();
}
TEST_(fp_compare) {
TEST_F(DisasmArm64Test, fp_compare) {
SET_UP_ASM();
COMPARE(fcmp(s0, s1), "fcmp s0, s1");
@ -1736,8 +1676,7 @@ TEST_(fp_compare) {
CLEANUP();
}
TEST_(fp_cond_compare) {
TEST_F(DisasmArm64Test, fp_cond_compare) {
SET_UP_ASM();
COMPARE(fccmp(s0, s1, NoFlag, eq), "fccmp s0, s1, #nzcv, eq");
@ -1754,8 +1693,7 @@ TEST_(fp_cond_compare) {
CLEANUP();
}
TEST_(fp_select) {
TEST_F(DisasmArm64Test, fp_select) {
SET_UP_ASM();
COMPARE(fcsel(s0, s1, s2, eq), "fcsel s0, s1, s2, eq")
@ -1768,8 +1706,7 @@ TEST_(fp_select) {
CLEANUP();
}
TEST_(fcvt_scvtf_ucvtf) {
TEST_F(DisasmArm64Test, fcvt_scvtf_ucvtf) {
SET_UP_ASM();
COMPARE(fcvtas(w0, s1), "fcvtas w0, s1");
@ -1851,8 +1788,7 @@ TEST_(fcvt_scvtf_ucvtf) {
CLEANUP();
}
TEST_(system_mrs) {
TEST_F(DisasmArm64Test, system_mrs) {
SET_UP_ASM();
COMPARE(mrs(x0, NZCV), "mrs x0, nzcv");
@ -1862,8 +1798,7 @@ TEST_(system_mrs) {
CLEANUP();
}
TEST_(system_msr) {
TEST_F(DisasmArm64Test, system_msr) {
SET_UP_ASM();
COMPARE(msr(NZCV, x0), "msr nzcv, x0");
@ -1873,8 +1808,7 @@ TEST_(system_msr) {
CLEANUP();
}
TEST_(system_nop) {
TEST_F(DisasmArm64Test, system_nop) {
{
SET_UP_ASM();
COMPARE(nop(), "nop");
@ -1887,7 +1821,7 @@ TEST_(system_nop) {
}
}
TEST_(bti) {
TEST_F(DisasmArm64Test, bti) {
{
SET_UP_ASM();
@ -1916,7 +1850,7 @@ TEST_(bti) {
}
}
TEST(system_pauth) {
TEST_F(DisasmArm64Test, system_pauth) {
SET_UP_ASM();
COMPARE(pacib1716(), "pacib1716");
@ -1927,13 +1861,10 @@ TEST(system_pauth) {
CLEANUP();
}
TEST_(debug) {
InitializeVM();
Isolate* isolate = CcTest::i_isolate();
TEST_F(DisasmArm64Test, debug) {
for (int i = 0; i < 2; i++) {
// Loop runs with and without the simulator code enabled.
HandleScope scope(isolate);
HandleScope scope(isolate());
byte* buf = static_cast<byte*>(malloc(INSTR_SIZE));
uint32_t encoding = 0;
AssemblerOptions options;
@ -1968,8 +1899,7 @@ TEST_(debug) {
}
}
TEST_(hlt) {
TEST_F(DisasmArm64Test, hlt) {
SET_UP_ASM();
COMPARE(hlt(0), "hlt #0x0");
@ -1979,8 +1909,7 @@ TEST_(hlt) {
CLEANUP();
}
TEST_(brk) {
TEST_F(DisasmArm64Test, brk) {
SET_UP_ASM();
COMPARE(brk(0), "brk #0x0");
@ -1990,8 +1919,7 @@ TEST_(brk) {
CLEANUP();
}
TEST_(add_sub_negative) {
TEST_F(DisasmArm64Test, add_sub_negative) {
SET_UP_MASM();
COMPARE(Add(x10, x0, -42), "sub x10, x0, #0x2a (42)");
@ -2021,8 +1949,7 @@ TEST_(add_sub_negative) {
CLEANUP();
}
TEST_(logical_immediate_move) {
TEST_F(DisasmArm64Test, logical_immediate_move) {
SET_UP_MASM();
COMPARE(And(w0, w1, 0), "movz w0, #0x0");
@ -2060,8 +1987,7 @@ TEST_(logical_immediate_move) {
CLEANUP();
}
TEST_(barriers) {
TEST_F(DisasmArm64Test, barriers) {
SET_UP_MASM();
// DMB
@ -2172,7 +2098,7 @@ TEST_(barriers) {
V(V4S(), "4s") \
V(V2D(), "2d")
TEST(neon_load_store_vector) {
TEST_F(DisasmArm64Test, neon_load_store_vector) {
SET_UP_MASM();
#define DISASM_INST(M, S) \
@ -2353,7 +2279,7 @@ TEST(neon_load_store_vector) {
CLEANUP();
}
TEST(neon_load_store_vector_unallocated) {
TEST_F(DisasmArm64Test, neon_load_store_vector_unallocated) {
SET_UP_MASM();
const char* expected = "unallocated (NEONLoadStoreMultiStruct)";
@ -2417,7 +2343,7 @@ TEST(neon_load_store_vector_unallocated) {
CLEANUP();
}
TEST(neon_load_store_lane) {
TEST_F(DisasmArm64Test, neon_load_store_lane) {
SET_UP_MASM();
COMPARE(Ld1(v0.V8B(), 0, MemOperand(x15)), "ld1 {v0.b}[0], [x15]");
@ -2803,7 +2729,7 @@ TEST(neon_load_store_lane) {
CLEANUP();
}
TEST(neon_load_store_lane_unallocated) {
TEST_F(DisasmArm64Test, neon_load_store_lane_unallocated) {
SET_UP_MASM();
const char* expected = "unallocated (NEONLoadStoreSingleStruct)";
@ -2877,7 +2803,7 @@ TEST(neon_load_store_lane_unallocated) {
CLEANUP();
}
TEST(neon_load_all_lanes) {
TEST_F(DisasmArm64Test, neon_load_all_lanes) {
SET_UP_MASM();
COMPARE(Ld1r(v14.V8B(), MemOperand(x0)), "ld1r {v14.8b}, [x0]");
@ -3005,7 +2931,7 @@ TEST(neon_load_all_lanes) {
CLEANUP();
}
TEST(neon_load_all_lanes_unallocated) {
TEST_F(DisasmArm64Test, neon_load_all_lanes_unallocated) {
SET_UP_MASM();
const char* expected = "unallocated (NEONLoadStoreSingleStruct)";
@ -3039,7 +2965,7 @@ TEST(neon_load_all_lanes_unallocated) {
CLEANUP();
}
TEST(neon_3same) {
TEST_F(DisasmArm64Test, neon_3same) {
SET_UP_MASM();
#define DISASM_INST(M, S) \
@ -3299,7 +3225,7 @@ TEST(neon_3same) {
CLEANUP();
}
TEST(neon_fp_3same) {
TEST_F(DisasmArm64Test, neon_fp_3same) {
SET_UP_MASM();
#define DISASM_INST(M, S) \
@ -3437,7 +3363,7 @@ TEST(neon_fp_3same) {
V(S(), "s") \
V(D(), "d")
TEST(neon_scalar_3same) {
TEST_F(DisasmArm64Test, neon_scalar_3same) {
SET_UP_MASM();
// Instructions that only support D-sized scalar operations.
@ -3521,7 +3447,7 @@ TEST(neon_scalar_3same) {
CLEANUP();
}
TEST(neon_byelement) {
TEST_F(DisasmArm64Test, neon_byelement) {
SET_UP_MASM();
COMPARE(Mul(v0.V4H(), v1.V4H(), v2.H(), 0), "mul v0.4h, v1.4h, v2.h[0]");
@ -3639,7 +3565,7 @@ TEST(neon_byelement) {
CLEANUP();
}
TEST(neon_fp_byelement) {
TEST_F(DisasmArm64Test, neon_fp_byelement) {
SET_UP_MASM();
COMPARE(Fmul(v0.V2S(), v1.V2S(), v2.S(), 0), "fmul v0.2s, v1.2s, v2.s[0]");
@ -3669,7 +3595,7 @@ TEST(neon_fp_byelement) {
CLEANUP();
}
TEST(neon_3different) {
TEST_F(DisasmArm64Test, neon_3different) {
SET_UP_MASM();
#define DISASM_INST(TA, TAS, TB, TBS) \
@ -3969,7 +3895,7 @@ TEST(neon_3different) {
CLEANUP();
}
TEST(neon_perm) {
TEST_F(DisasmArm64Test, neon_perm) {
SET_UP_MASM();
#define DISASM_INST(M, S) \
@ -4005,7 +3931,7 @@ TEST(neon_perm) {
CLEANUP();
}
TEST(neon_copy) {
TEST_F(DisasmArm64Test, neon_copy) {
SET_UP_MASM();
COMPARE(Ins(v1.V16B(), 4, v5.V16B(), 0), "mov v1.b[4], v5.b[0]");
@ -4128,7 +4054,7 @@ TEST(neon_copy) {
CLEANUP();
}
TEST(neon_extract) {
TEST_F(DisasmArm64Test, neon_extract) {
SET_UP_MASM();
COMPARE(Ext(v4.V8B(), v5.V8B(), v6.V8B(), 0), "ext v4.8b, v5.8b, v6.8b, #0");
@ -4141,7 +4067,7 @@ TEST(neon_extract) {
CLEANUP();
}
TEST(neon_table) {
TEST_F(DisasmArm64Test, neon_table) {
SET_UP_MASM();
COMPARE(Tbl(v0.V8B(), v1.V16B(), v2.V8B()), "tbl v0.8b, {v1.16b}, v2.8b");
@ -4183,7 +4109,7 @@ TEST(neon_table) {
CLEANUP();
}
TEST(neon_modimm) {
TEST_F(DisasmArm64Test, neon_modimm) {
SET_UP_MASM();
COMPARE(Orr(v4.V4H(), 0xaa, 0), "orr v4.4h, #0xaa, lsl #0");
@ -4244,7 +4170,7 @@ TEST(neon_modimm) {
CLEANUP();
}
TEST(neon_2regmisc) {
TEST_F(DisasmArm64Test, neon_2regmisc) {
SET_UP_MASM();
COMPARE(Shll(v1.V8H(), v8_.V8B(), 8), "shll v1.8h, v8.8b, #8");
@ -4624,7 +4550,7 @@ TEST(neon_2regmisc) {
CLEANUP();
}
TEST(neon_acrosslanes) {
TEST_F(DisasmArm64Test, neon_acrosslanes) {
SET_UP_MASM();
COMPARE(Smaxv(b4, v5.V8B()), "smaxv b4, v5.8b");
@ -4677,7 +4603,7 @@ TEST(neon_acrosslanes) {
CLEANUP();
}
TEST(neon_scalar_pairwise) {
TEST_F(DisasmArm64Test, neon_scalar_pairwise) {
SET_UP_MASM();
COMPARE(Addp(d0, v1.V2D()), "addp d0, v1.2d");
@ -4694,7 +4620,7 @@ TEST(neon_scalar_pairwise) {
CLEANUP();
}
TEST(neon_shift_immediate) {
TEST_F(DisasmArm64Test, neon_shift_immediate) {
SET_UP_MASM();
COMPARE(Sshr(v0.V8B(), v1.V8B(), 1), "sshr v0.8b, v1.8b, #1");