From e25cdf24bb9f5ee66923d25d9ca596cb41457358 Mon Sep 17 00:00:00 2001 From: Maya Lekova Date: Mon, 7 Oct 2019 14:48:08 +0000 Subject: [PATCH] Revert "[ptr-compr] Storing a Tagged value stores the lower 32 bits" This reverts commit 9b1e174f85c42d6efd5481e9153dbf593e2b3f1e. Reason for revert: Breaks arm64 sim debug build - https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20arm64%20-%20sim%20-%20debug/17609 Original change's description: > [ptr-compr] Storing a Tagged value stores the lower 32 bits > > This CL changes the Tagged stores when pointer compression is enabled. > It shouldn't affect anything for the time being since if we have pointer > compression enabled, we are going to be storing Compressed values. Later, > we will eliminate the Compressed representation and that it's where it > will come into effect. > > The Arm64 side of the CL looks bigger since we eliminated the opcode in > https://chromium-review.googlesource.com/c/v8/v8/+/1803345. > > Bug: v8:7703 > Change-Id: Ic4afbff9646b5d058adb9619b20ccccb3f5aed45 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1822044 > Reviewed-by: Jakob Gruber > Commit-Queue: Santiago Aboy Solanes > Cr-Commit-Position: refs/heads/master@{#64133} TBR=neis@chromium.org,jgruber@chromium.org,solanes@chromium.org Change-Id: I901f0802b40144492594f293657f7f2b58dc32cf No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:7703 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1845217 Reviewed-by: Maya Lekova Commit-Queue: Maya Lekova Cr-Commit-Position: refs/heads/master@{#64139} --- src/compiler/backend/arm64/code-generator-arm64.cc | 3 --- src/compiler/backend/arm64/instruction-codes-arm64.h | 1 - src/compiler/backend/arm64/instruction-scheduler-arm64.cc | 1 - src/compiler/backend/arm64/instruction-selector-arm64.cc | 8 ++------ src/compiler/backend/x64/instruction-selector-x64.cc | 3 +-- 5 files changed, 3 insertions(+), 13 deletions(-) diff --git a/src/compiler/backend/arm64/code-generator-arm64.cc b/src/compiler/backend/arm64/code-generator-arm64.cc index effc090453..728721d9ef 100644 --- a/src/compiler/backend/arm64/code-generator-arm64.cc +++ b/src/compiler/backend/arm64/code-generator-arm64.cc @@ -1616,9 +1616,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( case kArm64Str: __ Str(i.InputOrZeroRegister64(0), i.MemoryOperand(1)); break; - case kArm64StrCompressTagged: - __ StoreTaggedField(i.InputOrZeroRegister64(0), i.MemoryOperand(1)); - break; case kArm64DecompressSigned: { __ DecompressTaggedSigned(i.OutputRegister(), i.InputRegister(0)); break; diff --git a/src/compiler/backend/arm64/instruction-codes-arm64.h b/src/compiler/backend/arm64/instruction-codes-arm64.h index f379a02f2c..2333716814 100644 --- a/src/compiler/backend/arm64/instruction-codes-arm64.h +++ b/src/compiler/backend/arm64/instruction-codes-arm64.h @@ -164,7 +164,6 @@ namespace compiler { V(Arm64LdrDecompressTaggedPointer) \ V(Arm64LdrDecompressAnyTagged) \ V(Arm64Str) \ - V(Arm64StrCompressTagged) \ V(Arm64DecompressSigned) \ V(Arm64DecompressPointer) \ V(Arm64DecompressAny) \ diff --git a/src/compiler/backend/arm64/instruction-scheduler-arm64.cc b/src/compiler/backend/arm64/instruction-scheduler-arm64.cc index 254efb7184..6cca7ae351 100644 --- a/src/compiler/backend/arm64/instruction-scheduler-arm64.cc +++ b/src/compiler/backend/arm64/instruction-scheduler-arm64.cc @@ -355,7 +355,6 @@ int InstructionScheduler::GetTargetInstructionFlags( case kArm64Strh: case kArm64StrW: case kArm64Str: - case kArm64StrCompressTagged: case kArm64DmbIsh: case kArm64DsbIsb: return kHasSideEffect; diff --git a/src/compiler/backend/arm64/instruction-selector-arm64.cc b/src/compiler/backend/arm64/instruction-selector-arm64.cc index b24d69e16b..76cb4c35c9 100644 --- a/src/compiler/backend/arm64/instruction-selector-arm64.cc +++ b/src/compiler/backend/arm64/instruction-selector-arm64.cc @@ -724,7 +724,7 @@ void InstructionSelector::VisitStore(Node* node) { case MachineRepresentation::kCompressedPointer: // Fall through. case MachineRepresentation::kCompressed: #ifdef V8_COMPRESS_POINTERS - opcode = kArm64StrCompressTagged; + opcode = kArm64StrW; immediate_mode = kLoadStoreImm32; break; #else @@ -732,11 +732,7 @@ void InstructionSelector::VisitStore(Node* node) { #endif case MachineRepresentation::kTaggedSigned: // Fall through. case MachineRepresentation::kTaggedPointer: // Fall through. - case MachineRepresentation::kTagged: - opcode = kArm64StrCompressTagged; - immediate_mode = - COMPRESS_POINTERS_BOOL ? kLoadStoreImm32 : kLoadStoreImm64; - break; + case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kWord64: opcode = kArm64Str; immediate_mode = kLoadStoreImm64; diff --git a/src/compiler/backend/x64/instruction-selector-x64.cc b/src/compiler/backend/x64/instruction-selector-x64.cc index 4c8b2f13b4..1858f7675b 100644 --- a/src/compiler/backend/x64/instruction-selector-x64.cc +++ b/src/compiler/backend/x64/instruction-selector-x64.cc @@ -288,8 +288,7 @@ ArchOpcode GetStoreOpcode(StoreRepresentation store_rep) { #endif case MachineRepresentation::kTaggedSigned: // Fall through. case MachineRepresentation::kTaggedPointer: // Fall through. - case MachineRepresentation::kTagged: - return kX64MovqCompressTagged; + case MachineRepresentation::kTagged: // Fall through. case MachineRepresentation::kWord64: return kX64Movq; case MachineRepresentation::kSimd128: // Fall through.