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Update arm and mips simulator to also use cmath

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Review URL: https://codereview.chromium.org/14241029

Patch from Jochen Eisinger <jochen@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14355 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
danno@chromium.org 2013-04-19 14:22:38 +00:00
parent 600ed94a3d
commit e457b92a47
2 changed files with 13 additions and 10 deletions
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8
src/arm/simulator-arm.cc
View File

@ -26,7 +26,7 @@
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <stdlib.h> #include <stdlib.h>
#include <math.h> #include <cmath>
#include <cstdarg> #include <cstdarg>
#include "v8.h" #include "v8.h"
@ -1297,7 +1297,7 @@ bool Simulator::OverflowFrom(int32_t alu_out,
// Support for VFP comparisons. // Support for VFP comparisons.
void Simulator::Compute_FPSCR_Flags(double val1, double val2) { void Simulator::Compute_FPSCR_Flags(double val1, double val2) {
if (isnan(val1) || isnan(val2)) { if (std::isnan(val1) || std::isnan(val2)) {
n_flag_FPSCR_ = false; n_flag_FPSCR_ = false;
z_flag_FPSCR_ = false; z_flag_FPSCR_ = false;
c_flag_FPSCR_ = true; c_flag_FPSCR_ = true;
@ -1866,7 +1866,7 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
double Simulator::canonicalizeNaN(double value) { double Simulator::canonicalizeNaN(double value) {
return (FPSCR_default_NaN_mode_ && isnan(value)) ? return (FPSCR_default_NaN_mode_ && std::isnan(value)) ?
FixedDoubleArray::canonical_not_the_hole_nan_as_double() : value; FixedDoubleArray::canonical_not_the_hole_nan_as_double() : value;
} }
@ -2947,7 +2947,7 @@ void Simulator::DecodeVCMP(Instruction* instr) {
// Raise exceptions for quiet NaNs if necessary. // Raise exceptions for quiet NaNs if necessary.
if (instr->Bit(7) == 1) { if (instr->Bit(7) == 1) {
if (isnan(dd_value)) { if (std::isnan(dd_value)) {
inv_op_vfp_flag_ = true; inv_op_vfp_flag_ = true;
} }
} }

15
src/mips/simulator-mips.cc
View File

@ -26,8 +26,8 @@
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <stdlib.h> #include <stdlib.h>
#include <math.h>
#include <limits.h> #include <limits.h>
#include <cmath>
#include <cstdarg> #include <cstdarg>
#include "v8.h" #include "v8.h"
@ -1155,7 +1155,7 @@ bool Simulator::test_fcsr_bit(uint32_t cc) {
bool Simulator::set_fcsr_round_error(double original, double rounded) { bool Simulator::set_fcsr_round_error(double original, double rounded) {
bool ret = false; bool ret = false;
if (!isfinite(original) || !isfinite(rounded)) { if (!std::isfinite(original) || !std::isfinite(rounded)) {
set_fcsr_bit(kFCSRInvalidOpFlagBit, true); set_fcsr_bit(kFCSRInvalidOpFlagBit, true);
ret = true; ret = true;
} }
@ -2067,25 +2067,28 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
set_fpu_register_double(fd_reg, sqrt(fs)); set_fpu_register_double(fd_reg, sqrt(fs));
break; break;
case C_UN_D: case C_UN_D:
set_fcsr_bit(fcsr_cc, isnan(fs) || isnan(ft)); set_fcsr_bit(fcsr_cc, std::isnan(fs) || std::isnan(ft));
break; break;
case C_EQ_D: case C_EQ_D:
set_fcsr_bit(fcsr_cc, (fs == ft)); set_fcsr_bit(fcsr_cc, (fs == ft));
break; break;
case C_UEQ_D: case C_UEQ_D:
set_fcsr_bit(fcsr_cc, (fs == ft) || (isnan(fs) || isnan(ft))); set_fcsr_bit(fcsr_cc,
(fs == ft) || (std::isnan(fs) || std::isnan(ft)));
break; break;
case C_OLT_D: case C_OLT_D:
set_fcsr_bit(fcsr_cc, (fs < ft)); set_fcsr_bit(fcsr_cc, (fs < ft));
break; break;
case C_ULT_D: case C_ULT_D:
set_fcsr_bit(fcsr_cc, (fs < ft) || (isnan(fs) || isnan(ft))); set_fcsr_bit(fcsr_cc,
(fs < ft) || (std::isnan(fs) || std::isnan(ft)));
break; break;
case C_OLE_D: case C_OLE_D:
set_fcsr_bit(fcsr_cc, (fs <= ft)); set_fcsr_bit(fcsr_cc, (fs <= ft));
break; break;
case C_ULE_D: case C_ULE_D:
set_fcsr_bit(fcsr_cc, (fs <= ft) || (isnan(fs) || isnan(ft))); set_fcsr_bit(fcsr_cc,
(fs <= ft) || (std::isnan(fs) || std::isnan(ft)));
break; break;
case CVT_W_D: // Convert double to word. case CVT_W_D: // Convert double to word.
// Rounding modes are not yet supported. // Rounding modes are not yet supported.