[Liftoff] Merge i32 comparisons with subsequent br_if
Most comparisons are followed by a br_if instruction. This CL detects that for i32 comparisons and folds them with a following br_if, avoiding to materialize the result of the comparison as 0 or 1 in a register. This saves three out of the five instructions generated for this pattern before. Plus some drive-by cleanup. R=jkummerow@chromium.org Bug: v8:9831 Change-Id: I7bed47f2523b60b2bf301f074fe3132aea9a0636 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1862561 Commit-Queue: Clemens Backes <clemensb@chromium.org> Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Cr-Commit-Position: refs/heads/master@{#64330}
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Clemens Backes
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@ -119,6 +119,38 @@ constexpr ValueType kSupportedTypesArr[] = {kWasmI32, kWasmI64, kWasmF32,
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constexpr Vector<const ValueType> kSupportedTypes =
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ArrayVector(kSupportedTypesArr);
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constexpr Condition GetCompareCondition(WasmOpcode opcode) {
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switch (opcode) {
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case kExprI32Eq:
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return kEqual;
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case kExprI32Ne:
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return kUnequal;
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case kExprI32LtS:
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return kSignedLessThan;
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case kExprI32LtU:
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return kUnsignedLessThan;
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case kExprI32GtS:
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return kSignedGreaterThan;
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case kExprI32GtU:
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return kUnsignedGreaterThan;
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case kExprI32LeS:
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return kSignedLessEqual;
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case kExprI32LeU:
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return kUnsignedLessEqual;
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case kExprI32GeS:
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return kSignedGreaterEqual;
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case kExprI32GeU:
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return kUnsignedGreaterEqual;
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default:
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#if V8_HAS_CXX14_CONSTEXPR
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UNREACHABLE();
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#else
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// We need to return something for old compilers here.
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return kEqual;
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#endif
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}
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}
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class LiftoffCompiler {
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public:
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// TODO(clemensb): Make this a template parameter.
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@ -911,13 +943,13 @@ class LiftoffCompiler {
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void BinOp(FullDecoder* decoder, WasmOpcode opcode, const Value& lhs,
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const Value& rhs, Value* result) {
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#define CASE_I32_BINOP(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst.gp(), lhs.gp(), rhs.gp()); \
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});
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#define CASE_I32_BINOPI(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOpImm<kWasmI32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst.gp(), lhs.gp(), rhs.gp()); \
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@ -926,13 +958,13 @@ class LiftoffCompiler {
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__ emit_##fn(dst.gp(), lhs.gp(), imm); \
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});
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#define CASE_I64_BINOP(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI64, kWasmI64>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst, lhs, rhs); \
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});
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#define CASE_I64_BINOPI(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOpImm<kWasmI64, kWasmI64>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst, lhs, rhs); \
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@ -941,43 +973,50 @@ class LiftoffCompiler {
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__ emit_##fn(dst, lhs, imm); \
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});
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#define CASE_FLOAT_BINOP(opcode, type, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasm##type, kWasm##type>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst.fp(), lhs.fp(), rhs.fp()); \
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});
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#define CASE_I32_CMPOP(opcode, cond) \
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case WasmOpcode::kExpr##opcode: \
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#define CASE_I32_CMPOP(opcode) \
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case kExpr##opcode: \
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DCHECK_EQ(kExpr##opcode, decoder->pc()[0]); \
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if (decoder->pc()[1] == kExprBrIf) { \
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DCHECK(!has_outstanding_op()); \
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outstanding_op_ = kExpr##opcode; \
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break; \
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} \
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return EmitBinOp<kWasmI32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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constexpr Condition cond = GetCompareCondition(kExpr##opcode); \
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__ emit_i32_set_cond(cond, dst.gp(), lhs.gp(), rhs.gp()); \
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});
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#define CASE_I64_CMPOP(opcode, cond) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI64, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_i64_set_cond(cond, dst.gp(), lhs, rhs); \
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});
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#define CASE_F32_CMPOP(opcode, cond) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmF32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_f32_set_cond(cond, dst.gp(), lhs.fp(), rhs.fp()); \
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});
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#define CASE_F64_CMPOP(opcode, cond) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmF64, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_f64_set_cond(cond, dst.gp(), lhs.fp(), rhs.fp()); \
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});
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#define CASE_I32_SHIFTOP(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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__ emit_##fn(dst.gp(), lhs.gp(), rhs.gp(), {}); \
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});
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#define CASE_I64_SHIFTOP(opcode, fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI64, kWasmI64>([=](LiftoffRegister dst, \
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LiftoffRegister src, \
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LiftoffRegister amount) { \
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@ -985,7 +1024,7 @@ class LiftoffCompiler {
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{}); \
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});
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#define CASE_CCALL_BINOP(opcode, type, ext_ref_fn) \
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case WasmOpcode::kExpr##opcode: \
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case kExpr##opcode: \
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return EmitBinOp<kWasmI32, kWasmI32>( \
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[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
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LiftoffRegister args[] = {lhs, rhs}; \
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@ -1004,16 +1043,16 @@ class LiftoffCompiler {
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CASE_I64_BINOPI(I64And, i64_and)
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CASE_I64_BINOPI(I64Ior, i64_or)
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CASE_I64_BINOPI(I64Xor, i64_xor)
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CASE_I32_CMPOP(I32Eq, kEqual)
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CASE_I32_CMPOP(I32Ne, kUnequal)
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CASE_I32_CMPOP(I32LtS, kSignedLessThan)
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CASE_I32_CMPOP(I32LtU, kUnsignedLessThan)
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CASE_I32_CMPOP(I32GtS, kSignedGreaterThan)
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CASE_I32_CMPOP(I32GtU, kUnsignedGreaterThan)
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CASE_I32_CMPOP(I32LeS, kSignedLessEqual)
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CASE_I32_CMPOP(I32LeU, kUnsignedLessEqual)
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CASE_I32_CMPOP(I32GeS, kSignedGreaterEqual)
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CASE_I32_CMPOP(I32GeU, kUnsignedGreaterEqual)
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CASE_I32_CMPOP(I32Eq)
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CASE_I32_CMPOP(I32Ne)
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CASE_I32_CMPOP(I32LtS)
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CASE_I32_CMPOP(I32LtU)
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CASE_I32_CMPOP(I32GtS)
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CASE_I32_CMPOP(I32GtU)
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CASE_I32_CMPOP(I32LeS)
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CASE_I32_CMPOP(I32LeU)
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CASE_I32_CMPOP(I32GeS)
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CASE_I32_CMPOP(I32GeU)
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CASE_I64_BINOPI(I64Add, i64_add)
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CASE_I64_BINOP(I64Sub, i64_sub)
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CASE_I64_BINOP(I64Mul, i64_mul)
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@ -1061,7 +1100,7 @@ class LiftoffCompiler {
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CASE_FLOAT_BINOP(F64Min, F64, f64_min)
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CASE_FLOAT_BINOP(F64Max, F64, f64_max)
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CASE_FLOAT_BINOP(F64CopySign, F64, f64_copysign)
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case WasmOpcode::kExprI32DivS:
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case kExprI32DivS:
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EmitBinOp<kWasmI32, kWasmI32>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1077,7 +1116,7 @@ class LiftoffCompiler {
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div_unrepresentable);
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});
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break;
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case WasmOpcode::kExprI32DivU:
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case kExprI32DivU:
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EmitBinOp<kWasmI32, kWasmI32>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1086,7 +1125,7 @@ class LiftoffCompiler {
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__ emit_i32_divu(dst.gp(), lhs.gp(), rhs.gp(), div_by_zero);
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});
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break;
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case WasmOpcode::kExprI32RemS:
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case kExprI32RemS:
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EmitBinOp<kWasmI32, kWasmI32>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1095,7 +1134,7 @@ class LiftoffCompiler {
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__ emit_i32_rems(dst.gp(), lhs.gp(), rhs.gp(), rem_by_zero);
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});
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break;
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case WasmOpcode::kExprI32RemU:
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case kExprI32RemU:
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EmitBinOp<kWasmI32, kWasmI32>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1104,7 +1143,7 @@ class LiftoffCompiler {
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__ emit_i32_remu(dst.gp(), lhs.gp(), rhs.gp(), rem_by_zero);
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});
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break;
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case WasmOpcode::kExprI64DivS:
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case kExprI64DivS:
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EmitBinOp<kWasmI64, kWasmI64>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1124,7 +1163,7 @@ class LiftoffCompiler {
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}
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});
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break;
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case WasmOpcode::kExprI64DivU:
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case kExprI64DivU:
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EmitBinOp<kWasmI64, kWasmI64>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1136,7 +1175,7 @@ class LiftoffCompiler {
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}
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});
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break;
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case WasmOpcode::kExprI64RemS:
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case kExprI64RemS:
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EmitBinOp<kWasmI64, kWasmI64>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1148,7 +1187,7 @@ class LiftoffCompiler {
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}
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});
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break;
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case WasmOpcode::kExprI64RemU:
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case kExprI64RemU:
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EmitBinOp<kWasmI64, kWasmI64>([this, decoder](LiftoffRegister dst,
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LiftoffRegister lhs,
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LiftoffRegister rhs) {
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@ -1160,8 +1199,8 @@ class LiftoffCompiler {
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}
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});
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break;
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case WasmOpcode::kExprI64Rol:
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case WasmOpcode::kExprI64Ror:
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case kExprI64Rol:
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case kExprI64Ror:
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return unsupported(decoder, kComplexOperation,
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WasmOpcodes::OpcodeName(opcode));
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default:
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@ -1421,17 +1460,24 @@ class LiftoffCompiler {
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}
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void BrIf(FullDecoder* decoder, const Value& /* cond */, uint32_t depth) {
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Condition cond = kEqual; // Unary "equal" means "equals zero".
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if (has_outstanding_op()) {
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DCHECK_EQ(kExprI32Eqz, outstanding_op_);
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cond = kUnequal; // Unary "unequal" means "not equals zero".
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outstanding_op_ = kNoOutstandingOp;
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}
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Label cont_false;
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Register value = __ PopToRegister().gp();
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__ emit_cond_jump(cond, &cont_false, kWasmI32, value);
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if (!has_outstanding_op()) {
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// Unary "equal" means "equals zero".
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__ emit_cond_jump(kEqual, &cont_false, kWasmI32, value);
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} else if (outstanding_op_ == kExprI32Eqz) {
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// Unary "unequal" means "not equals zero".
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__ emit_cond_jump(kUnequal, &cont_false, kWasmI32, value);
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outstanding_op_ = kNoOutstandingOp;
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} else {
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// Otherwise, it's an i32 compare opcode.
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Condition cond = NegateCondition(GetCompareCondition(outstanding_op_));
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Register rhs = value;
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Register lhs = __ PopToRegister(LiftoffRegList::ForRegs(rhs)).gp();
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__ emit_cond_jump(cond, &cont_false, kWasmI32, lhs, rhs);
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outstanding_op_ = kNoOutstandingOp;
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}
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BrOrRet(decoder, depth);
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__ bind(&cont_false);
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