Small improvement in x64 assembler

Review URL: https://chromiumcodereview.appspot.com/12177012
Patch from Zheng Z. Liu <zheng.z.liu@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13605 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
yangguo@chromium.org 2013-02-06 11:54:27 +00:00
parent f08b6ecac7
commit e6d0315b74
2 changed files with 9 additions and 19 deletions

View File

@ -1505,13 +1505,12 @@ void Assembler::movq(Register dst, void* value, RelocInfo::Mode rmode) {
void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
// Non-relocatable values might not need a 64-bit representation.
if (RelocInfo::IsNone(rmode)) {
// Sadly, there is no zero or sign extending move for 8-bit immediates.
if (is_int32(value)) {
movq(dst, Immediate(static_cast<int32_t>(value)));
return;
} else if (is_uint32(value)) {
if (is_uint32(value)) {
movl(dst, Immediate(static_cast<int32_t>(value)));
return;
} else if (is_int32(value)) {
movq(dst, Immediate(static_cast<int32_t>(value)));
return;
}
// Value cannot be represented by 32 bits, so do a full 64 bit immediate
// value.

View File

@ -2911,23 +2911,14 @@ void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg,
}
static double kUint32Bias =
static_cast<double>(static_cast<uint32_t>(0xFFFFFFFF)) + 1;
void MacroAssembler::LoadUint32(XMMRegister dst,
Register src,
XMMRegister scratch) {
Label done;
cmpl(src, Immediate(0));
movq(kScratchRegister,
reinterpret_cast<int64_t>(&kUint32Bias),
RelocInfo::NONE64);
movsd(scratch, Operand(kScratchRegister, 0));
cvtlsi2sd(dst, src);
j(not_sign, &done, Label::kNear);
addsd(dst, scratch);
bind(&done);
if (FLAG_debug_code) {
cmpq(src, Immediate(0xffffffff));
Assert(below_equal, "input GPR is expected to have upper32 cleared");
}
cvtqsi2sd(dst, src);
}