Small improvement in x64 assembler
Review URL: https://chromiumcodereview.appspot.com/12177012 Patch from Zheng Z. Liu <zheng.z.liu@intel.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13605 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -1505,13 +1505,12 @@ void Assembler::movq(Register dst, void* value, RelocInfo::Mode rmode) {
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void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
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// Non-relocatable values might not need a 64-bit representation.
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if (RelocInfo::IsNone(rmode)) {
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// Sadly, there is no zero or sign extending move for 8-bit immediates.
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if (is_int32(value)) {
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movq(dst, Immediate(static_cast<int32_t>(value)));
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return;
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} else if (is_uint32(value)) {
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if (is_uint32(value)) {
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movl(dst, Immediate(static_cast<int32_t>(value)));
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return;
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} else if (is_int32(value)) {
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movq(dst, Immediate(static_cast<int32_t>(value)));
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return;
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}
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// Value cannot be represented by 32 bits, so do a full 64 bit immediate
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// value.
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@ -2911,23 +2911,14 @@ void MacroAssembler::ClampDoubleToUint8(XMMRegister input_reg,
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}
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static double kUint32Bias =
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static_cast<double>(static_cast<uint32_t>(0xFFFFFFFF)) + 1;
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void MacroAssembler::LoadUint32(XMMRegister dst,
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Register src,
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XMMRegister scratch) {
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Label done;
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cmpl(src, Immediate(0));
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movq(kScratchRegister,
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reinterpret_cast<int64_t>(&kUint32Bias),
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RelocInfo::NONE64);
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movsd(scratch, Operand(kScratchRegister, 0));
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cvtlsi2sd(dst, src);
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j(not_sign, &done, Label::kNear);
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addsd(dst, scratch);
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bind(&done);
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if (FLAG_debug_code) {
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cmpq(src, Immediate(0xffffffff));
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Assert(below_equal, "input GPR is expected to have upper32 cleared");
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}
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cvtqsi2sd(dst, src);
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}
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