X87: [Atomics] Fix disassembly for ia32 xchg_b and xchg_w.
port af677d7b34
(r35998)
original commit message:
https://codereview.chromium.org/1938213002 added xchg_b and xchg_w, but didn't
add it to the disassembler, and there were no tests that caught it.
BUG=
Review-Url: https://codereview.chromium.org/1947843002
Cr-Commit-Position: refs/heads/master@{#36051}
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@ -30,18 +30,19 @@ struct ByteMnemonic {
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};
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static const ByteMnemonic two_operands_instr[] = {
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{0x01, "add", OPER_REG_OP_ORDER}, {0x03, "add", REG_OPER_OP_ORDER},
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{0x09, "or", OPER_REG_OP_ORDER}, {0x0B, "or", REG_OPER_OP_ORDER},
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{0x13, "adc", REG_OPER_OP_ORDER}, {0x1B, "sbb", REG_OPER_OP_ORDER},
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{0x21, "and", OPER_REG_OP_ORDER}, {0x23, "and", REG_OPER_OP_ORDER},
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{0x29, "sub", OPER_REG_OP_ORDER}, {0x2A, "subb", REG_OPER_OP_ORDER},
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{0x2B, "sub", REG_OPER_OP_ORDER}, {0x31, "xor", OPER_REG_OP_ORDER},
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{0x33, "xor", REG_OPER_OP_ORDER}, {0x38, "cmpb", OPER_REG_OP_ORDER},
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{0x39, "cmp", OPER_REG_OP_ORDER}, {0x3A, "cmpb", REG_OPER_OP_ORDER},
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{0x3B, "cmp", REG_OPER_OP_ORDER}, {0x84, "test_b", REG_OPER_OP_ORDER},
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{0x85, "test", REG_OPER_OP_ORDER}, {0x87, "xchg", REG_OPER_OP_ORDER},
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{0x8A, "mov_b", REG_OPER_OP_ORDER}, {0x8B, "mov", REG_OPER_OP_ORDER},
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{0x8D, "lea", REG_OPER_OP_ORDER}, {-1, "", UNSET_OP_ORDER}};
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{0x01, "add", OPER_REG_OP_ORDER}, {0x03, "add", REG_OPER_OP_ORDER},
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{0x09, "or", OPER_REG_OP_ORDER}, {0x0B, "or", REG_OPER_OP_ORDER},
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{0x13, "adc", REG_OPER_OP_ORDER}, {0x1B, "sbb", REG_OPER_OP_ORDER},
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{0x21, "and", OPER_REG_OP_ORDER}, {0x23, "and", REG_OPER_OP_ORDER},
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{0x29, "sub", OPER_REG_OP_ORDER}, {0x2A, "subb", REG_OPER_OP_ORDER},
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{0x2B, "sub", REG_OPER_OP_ORDER}, {0x31, "xor", OPER_REG_OP_ORDER},
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{0x33, "xor", REG_OPER_OP_ORDER}, {0x38, "cmpb", OPER_REG_OP_ORDER},
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{0x39, "cmp", OPER_REG_OP_ORDER}, {0x3A, "cmpb", REG_OPER_OP_ORDER},
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{0x3B, "cmp", REG_OPER_OP_ORDER}, {0x84, "test_b", REG_OPER_OP_ORDER},
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{0x85, "test", REG_OPER_OP_ORDER}, {0x86, "xchg_b", REG_OPER_OP_ORDER},
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{0x87, "xchg", REG_OPER_OP_ORDER}, {0x8A, "mov_b", REG_OPER_OP_ORDER},
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{0x8B, "mov", REG_OPER_OP_ORDER}, {0x8D, "lea", REG_OPER_OP_ORDER},
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{-1, "", UNSET_OP_ORDER}};
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static const ByteMnemonic zero_operands_instr[] = {
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{0xC3, "ret", UNSET_OP_ORDER},
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@ -1267,6 +1268,13 @@ int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer,
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} else if (*data == 0x8B) {
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data++;
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data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data);
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} else if (*data == 0x87) {
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data++;
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int mod, regop, rm;
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get_modrm(*data, &mod, ®op, &rm);
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AppendToBuffer("xchg_w ");
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data += PrintRightOperand(data);
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AppendToBuffer(",%s", NameOfCPURegister(regop));
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} else if (*data == 0x89) {
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data++;
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int mod, regop, rm;
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