Enable ARMv8 32-bit build.
R=danno@chromium.org Review URL: https://codereview.chromium.org/1427003006 Cr-Commit-Position: refs/heads/master@{#31690}
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@ -52,6 +52,14 @@ namespace internal {
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// snapshot.
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static unsigned CpuFeaturesImpliedByCompiler() {
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unsigned answer = 0;
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#ifdef CAN_USE_ARMV8_INSTRUCTIONS
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if (FLAG_enable_armv8) {
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answer |= 1u << ARMv8;
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// ARMv8 always features VFP and NEON.
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answer |= 1u << ARMv7 | 1u << VFP3 | 1u << NEON | 1u << VFP32DREGS;
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answer |= 1u << SUDIV | 1u << MLS;
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}
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#endif // CAN_USE_ARMV8_INSTRUCTIONS
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#ifdef CAN_USE_ARMV7_INSTRUCTIONS
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if (FLAG_enable_armv7) answer |= 1u << ARMv7;
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#endif // CAN_USE_ARMV7_INSTRUCTIONS
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@ -81,6 +89,13 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
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#ifndef __arm__
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// For the simulator build, use whatever the flags specify.
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if (FLAG_enable_armv8) {
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supported_ |= 1u << ARMv8;
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// ARMv8 always features VFP and NEON.
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supported_ |= 1u << ARMv7 | 1u << VFP3 | 1u << NEON | 1u << VFP32DREGS;
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supported_ |= 1u << SUDIV | 1u << MLS;
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if (FLAG_enable_movw_movt) supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS;
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}
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if (FLAG_enable_armv7) {
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supported_ |= 1u << ARMv7;
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if (FLAG_enable_vfp3) supported_ |= 1u << VFP3;
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@ -154,7 +169,9 @@ void CpuFeatures::PrintTarget() {
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arm_no_probe = " noprobe";
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#endif
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#if defined CAN_USE_ARMV7_INSTRUCTIONS
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#if defined CAN_USE_ARMV8_INSTRUCTIONS
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arm_arch = "arm v8";
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#elif defined CAN_USE_ARMV7_INSTRUCTIONS
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arm_arch = "arm v7";
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#else
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arm_arch = "arm v6";
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@ -192,13 +209,15 @@ void CpuFeatures::PrintTarget() {
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void CpuFeatures::PrintFeatures() {
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printf(
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"ARMv7=%d VFP3=%d VFP32DREGS=%d NEON=%d SUDIV=%d UNALIGNED_ACCESSES=%d "
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"MOVW_MOVT_IMMEDIATE_LOADS=%d COHERENT_CACHE=%d",
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"ARMv8=%d ARMv7=%d VFP3=%d VFP32DREGS=%d NEON=%d SUDIV=%d MLS=%d"
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"UNALIGNED_ACCESSES=%d MOVW_MOVT_IMMEDIATE_LOADS=%d COHERENT_CACHE=%d",
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CpuFeatures::IsSupported(ARMv8),
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CpuFeatures::IsSupported(ARMv7),
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CpuFeatures::IsSupported(VFP3),
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CpuFeatures::IsSupported(VFP32DREGS),
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CpuFeatures::IsSupported(NEON),
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CpuFeatures::IsSupported(SUDIV),
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CpuFeatures::IsSupported(MLS),
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CpuFeatures::IsSupported(UNALIGNED_ACCESSES),
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CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS),
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CpuFeatures::IsSupported(COHERENT_CACHE));
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@ -68,6 +68,10 @@
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# endif
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#endif
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#if defined(__ARM_ARCH_8A__)
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# define CAN_USE_ARMV8_INSTRUCTIONS 1
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#endif
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// Target architecture detection. This may be set externally. If not, detect
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// in the same way as the host architecture, that is, target the native
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@ -519,6 +519,12 @@ DEFINE_BOOL(force_long_branches, false,
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"force all emitted branches to be in long mode (MIPS/PPC only)")
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DEFINE_STRING(mcpu, "auto", "enable optimization for specific cpu")
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DEFINE_IMPLICATION(enable_armv8, enable_vfp3)
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DEFINE_IMPLICATION(enable_armv8, enable_neon)
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DEFINE_IMPLICATION(enable_armv8, enable_32dregs)
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DEFINE_IMPLICATION(enable_armv8, enable_sudiv)
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DEFINE_IMPLICATION(enable_armv8, enable_mls)
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// bootstrapper.cc
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DEFINE_STRING(expose_natives_as, NULL, "expose natives in global object")
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DEFINE_STRING(expose_debug_as, NULL, "expose debug in global object")
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@ -1975,8 +1975,16 @@ TEST(ARMv8_vrintX) {
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CHECK_VRINT(inf, inf, inf, inf, inf, inf)
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CHECK_VRINT(-inf, -inf, -inf, -inf, -inf, -inf)
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CHECK_VRINT(-0.0, -0.0, -0.0, -0.0, -0.0, -0.0)
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// Check NaN propagation.
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double nan = std::numeric_limits<double>::quiet_NaN();
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CHECK_VRINT(nan, nan, nan, nan, nan, nan)
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t.input = nan;
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dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0);
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CHECK_EQ(bit_cast<int64_t>(nan), bit_cast<int64_t>(t.ar));
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CHECK_EQ(bit_cast<int64_t>(nan), bit_cast<int64_t>(t.nr));
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CHECK_EQ(bit_cast<int64_t>(nan), bit_cast<int64_t>(t.mr));
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CHECK_EQ(bit_cast<int64_t>(nan), bit_cast<int64_t>(t.pr));
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CHECK_EQ(bit_cast<int64_t>(nan), bit_cast<int64_t>(t.zr));
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#undef CHECK_VRINT
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}
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@ -26,6 +26,7 @@
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// Flags: --allow-natives-syntax --nouse-inlining --noenable-sudiv
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// Flags: --noenable-armv8
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// Use this function as reference. Make sure it is not inlined.
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function div(a, b) {
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