Revert "[arm64][liftoff] Fix trap handling on load lane"
This reverts commit 1786f8d770
.
Reason for revert: https://ci.chromium.org/ui/p/v8/builders/ci/V8%20Linux64/44442/overview
Original change's description:
> [arm64][liftoff] Fix trap handling on load lane
>
> This fixes the registered {protected_load_pc} to (always) point to the
> actual load instruction. If {dst != src} we would emit a register move
> before the load, and the trap handler would then not recognize the PC
> where the signal occurs, leading to a segfault.
>
> R=thibaudm@chromium.org
>
> Bug: chromium:1242300, v8:12018
> Change-Id: I3ed2a8307e353fd85a7ddedf6ecb73e90a112d32
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3136454
> Reviewed-by: Thibaud Michaud <thibaudm@chromium.org>
> Commit-Queue: Clemens Backes <clemensb@chromium.org>
> Cr-Commit-Position: refs/heads/main@{#76642}
Bug: chromium:1242300, v8:12018
Change-Id: I7bc9d00a4fba3101e7ee68695961d1b543268c4e
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3138202
Reviewed-by: Nico Hartmann <nicohartmann@chromium.org>
Commit-Queue: Nico Hartmann <nicohartmann@chromium.org>
Cr-Commit-Position: refs/heads/main@{#76644}
This commit is contained in:
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@ -1707,13 +1707,13 @@ void LiftoffAssembler::LoadLane(LiftoffRegister dst, LiftoffRegister src,
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UseScratchRegisterScope temps(this);
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MemOperand src_op{
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liftoff::GetEffectiveAddress(this, &temps, addr, offset_reg, offset_imm)};
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*protected_load_pc = pc_offset();
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MachineType mem_type = type.mem_type();
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if (dst != src) {
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Mov(dst.fp().Q(), src.fp().Q());
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}
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*protected_load_pc = pc_offset();
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if (mem_type == MachineType::Int8()) {
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ld1(dst.fp().B(), laneidx, src_op);
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} else if (mem_type == MachineType::Int16()) {
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@ -1478,9 +1478,8 @@
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##############################################################################
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['variant == instruction_scheduling or variant == stress_instruction_scheduling', {
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# BUG(12018): These tests currently fail with --turbo-instruction-scheduling.
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# BUG(12018): This test currently fails with --turbo-instruction-scheduling.
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'regress/wasm/regress-1231950': [SKIP],
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'regress/wasm/regress-1242300': [SKIP],
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}], # variant == instruction_scheduling or variant == stress_instruction_scheduling
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################################################################################
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@ -1,24 +0,0 @@
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// Copyright 2021 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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load('test/mjsunit/wasm/wasm-module-builder.js');
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const builder = new WasmModuleBuilder();
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builder.addMemory(16, 32);
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builder.addFunction(undefined, kSig_i_iii)
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.addBody([
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kExprI32Const, 0x7f, // i32.const
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kExprI32Const, 0x1e, // i32.const
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kSimdPrefix, kExprI8x16Splat, // i8x16.splat
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kExprI32Const, 0, // i32.const
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kSimdPrefix, kExprI8x16Splat, // i8x16.splat
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kExprI32Const, 0, // i32.const
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kSimdPrefix, kExprI8x16Splat, // i8x16.splat
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kSimdPrefix, kExprS128Select, // s128.select
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kSimdPrefix, kExprS128Load32Lane, 0x00, 0x89, 0xfe, 0x03, 0x00, // s128.load32_lane
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kExprUnreachable,
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]);
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builder.addExport('main', 0);
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const instance = builder.instantiate();
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assertTraps(kTrapMemOutOfBounds, () => instance.exports.main(1, 2, 3));
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