Fix the ARM simulator's stop support and add conditional breakpoint.
BUG=none TEST=none Review URL: http://codereview.chromium.org/6346009 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6405 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -1656,8 +1656,14 @@ void Assembler::stop(const char* msg, Condition cond, int32_t code) {
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emit(reinterpret_cast<Instr>(msg));
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#else // def __arm__
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#ifdef CAN_USE_ARMV5_INSTRUCTIONS
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ASSERT(cond == al);
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bkpt(0);
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if (cond != al) {
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Label skip;
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b(&skip, NegateCondition(cond));
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bkpt(0);
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bind(&skip);
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} else {
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bkpt(0);
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}
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#else // ndef CAN_USE_ARMV5_INSTRUCTIONS
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svc(0x9f0001, cond);
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#endif // ndef CAN_USE_ARMV5_INSTRUCTIONS
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@ -352,6 +352,11 @@ class Instr {
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&& (Bit(20) == 0)
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&& ((Bit(7) == 0)); }
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// Test for a stop instruction.
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inline bool IsStop() const {
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return (TypeField() == 7) && (Bit(24) == 1) && (SvcField() >= stop);
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}
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// Special accessors that test for existence of a value.
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inline bool HasS() const { return SField() == 1; }
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inline bool HasB() const { return BField() == 1; }
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@ -455,7 +455,7 @@ void Debugger::Debug() {
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PrintF("DIV BY ZERO flag: %d; ", sim_->div_zero_vfp_flag_);
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PrintF("OVERFLOW flag: %d; ", sim_->overflow_vfp_flag_);
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PrintF("UNDERFLOW flag: %d; ", sim_->underflow_vfp_flag_);
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PrintF("INEXACT flag: %d; ", sim_->inexact_vfp_flag_);
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PrintF("INEXACT flag: %d;\n", sim_->inexact_vfp_flag_);
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} else if (strcmp(cmd, "stop") == 0) {
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int32_t value;
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intptr_t stop_pc = sim_->get_pc() - 2 * Instr::kInstrSize;
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@ -2907,6 +2907,10 @@ void Simulator::InstructionDecode(Instr* instr) {
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break;
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}
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}
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// If the instruction is a non taken conditional stop, we need to skip the
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// inlined message address.
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} else if (instr->IsStop()) {
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set_pc(get_pc() + 2 * Instr::kInstrSize);
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}
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if (!pc_modified_) {
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set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize);
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