MIPS[64]: Fix register overwrite in ShiftPair instructions
This patch fixes register overwrite in ShrPair, ShlPair and SarPair instructions. Additionally, we rename kLithiumScratch register register since lithium is not present anymore. Change-Id: I65861c4f27d2161bcf49cf02ca8987eb82c997ea Reviewed-on: https://chromium-review.googlesource.com/1012110 Reviewed-by: Sreten Kovacevic <sreten.kovacevic@mips.com> Commit-Queue: Sreten Kovacevic <sreten.kovacevic@mips.com> Cr-Commit-Position: refs/heads/master@{#52593}
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@ -2663,7 +2663,7 @@ void Builtins::Generate_DoubleToI(MacroAssembler* masm) {
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Register scratch = GetRegisterThatIsNotOneOf(result_reg);
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Register scratch2 = GetRegisterThatIsNotOneOf(result_reg, scratch);
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Register scratch3 = GetRegisterThatIsNotOneOf(result_reg, scratch, scratch2);
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DoubleRegister double_scratch = kLithiumScratchDouble;
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DoubleRegister double_scratch = kScratchDoubleReg;
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// Account for saved regs.
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const int kArgumentOffset = 4 * kPointerSize;
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@ -2682,7 +2682,7 @@ void Builtins::Generate_DoubleToI(MacroAssembler* masm) {
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Register scratch = GetRegisterThatIsNotOneOf(result_reg);
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Register scratch2 = GetRegisterThatIsNotOneOf(result_reg, scratch);
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Register scratch3 = GetRegisterThatIsNotOneOf(result_reg, scratch, scratch2);
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DoubleRegister double_scratch = kLithiumScratchDouble;
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DoubleRegister double_scratch = kScratchDoubleReg;
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// Account for saved regs.
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const int kArgumentOffset = 4 * kPointerSize;
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@ -19,13 +19,6 @@ namespace compiler {
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#define __ tasm()->
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// TODO(plind): Possibly avoid using these lithium names.
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#define kScratchReg kLithiumScratchReg
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#define kCompareReg kLithiumScratchReg2
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#define kScratchReg2 kLithiumScratchReg2
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#define kScratchDoubleReg kLithiumScratchDouble
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// TODO(plind): consider renaming these macros.
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#define TRACE_MSG(msg) \
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PrintF("code_gen: \'%s\' in function %s at line %d\n", msg, __FUNCTION__, \
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@ -1037,11 +1030,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
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if (instr->InputAt(2)->IsRegister()) {
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__ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), i.InputRegister(2));
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i.InputRegister(1), i.InputRegister(2), kScratchReg,
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kScratchReg2);
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} else {
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uint32_t imm = i.InputOperand(2).immediate();
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__ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), imm);
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i.InputRegister(1), imm, kScratchReg);
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}
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} break;
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case kMipsShrPair: {
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@ -1049,11 +1043,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
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if (instr->InputAt(2)->IsRegister()) {
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__ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), i.InputRegister(2));
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i.InputRegister(1), i.InputRegister(2), kScratchReg,
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kScratchReg2);
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} else {
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uint32_t imm = i.InputOperand(2).immediate();
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__ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), imm);
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i.InputRegister(1), imm, kScratchReg);
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}
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} break;
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case kMipsSarPair: {
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@ -1061,11 +1056,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
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if (instr->InputAt(2)->IsRegister()) {
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__ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), i.InputRegister(2));
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i.InputRegister(1), i.InputRegister(2), kScratchReg,
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kScratchReg2);
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} else {
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uint32_t imm = i.InputOperand(2).immediate();
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__ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0),
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i.InputRegister(1), imm);
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i.InputRegister(1), imm, kScratchReg);
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}
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} break;
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case kMipsExt:
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@ -3485,7 +3481,7 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
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} else if (source->IsStackSlot()) {
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DCHECK(destination->IsStackSlot());
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Register temp_0 = kScratchReg;
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Register temp_1 = kCompareReg;
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Register temp_1 = kScratchReg2;
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MemOperand src = g.ToMemOperand(source);
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MemOperand dst = g.ToMemOperand(destination);
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__ lw(temp_0, src);
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@ -19,11 +19,6 @@ namespace compiler {
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#define __ tasm()->
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// TODO(plind): Possibly avoid using these lithium names.
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#define kScratchReg kLithiumScratchReg
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#define kScratchReg2 kLithiumScratchReg2
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#define kScratchDoubleReg kLithiumScratchDouble
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// TODO(plind): consider renaming these macros.
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#define TRACE_MSG(msg) \
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@ -320,9 +320,9 @@ const Simd128Register no_msareg = Simd128Register::no_reg();
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// cp is assumed to be a callee saved register.
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constexpr Register kRootRegister = s6;
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constexpr Register cp = s7;
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constexpr Register kLithiumScratchReg = s3;
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constexpr Register kLithiumScratchReg2 = s4;
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constexpr DoubleRegister kLithiumScratchDouble = f30;
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constexpr Register kScratchReg = s3;
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constexpr Register kScratchReg2 = s4;
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constexpr DoubleRegister kScratchDoubleReg = f30;
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constexpr DoubleRegister kDoubleRegZero = f28;
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// Used on mips32r6 for compare operations.
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constexpr DoubleRegister kDoubleCompareReg = f26;
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@ -1443,33 +1443,33 @@ void TurboAssembler::SubPair(Register dst_low, Register dst_high,
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void TurboAssembler::ShlPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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Register shift) {
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Register shift, Register scratch1,
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Register scratch2) {
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BlockTrampolinePoolScope block_trampoline_pool(this);
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Label done;
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Register kScratchReg = s3;
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Register kScratchReg2 = s4;
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And(shift, shift, 0x3F);
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sllv(dst_low, src_low, shift);
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Nor(kScratchReg2, zero_reg, shift);
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srl(kScratchReg, src_low, 1);
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srlv(kScratchReg, kScratchReg, kScratchReg2);
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sllv(dst_high, src_high, shift);
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Or(dst_high, dst_high, kScratchReg);
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And(kScratchReg, shift, 32);
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Register scratch3 = t8;
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And(scratch3, shift, 0x3F);
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sllv(dst_low, src_low, scratch3);
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Nor(scratch2, zero_reg, scratch3);
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srl(scratch1, src_low, 1);
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srlv(scratch1, scratch1, scratch2);
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sllv(dst_high, src_high, scratch3);
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Or(dst_high, dst_high, scratch1);
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And(scratch1, scratch3, 32);
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if (IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r6)) {
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Branch(&done, eq, kScratchReg, Operand(zero_reg));
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Branch(&done, eq, scratch1, Operand(zero_reg));
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mov(dst_high, dst_low);
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mov(dst_low, zero_reg);
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} else {
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movn(dst_high, dst_low, kScratchReg);
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movn(dst_low, zero_reg, kScratchReg);
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movn(dst_high, dst_low, scratch1);
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movn(dst_low, zero_reg, scratch1);
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}
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bind(&done);
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}
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void TurboAssembler::ShlPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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uint32_t shift) {
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Register kScratchReg = s3;
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uint32_t shift, Register scratch) {
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shift = shift & 0x3F;
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if (shift == 0) {
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mov(dst_low, src_low);
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@ -1482,8 +1482,8 @@ void TurboAssembler::ShlPair(Register dst_low, Register dst_high,
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} else {
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sll(dst_high, src_high, shift);
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sll(dst_low, src_low, shift);
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srl(kScratchReg, src_low, 32 - shift);
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Or(dst_high, dst_high, kScratchReg);
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srl(scratch, src_low, 32 - shift);
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Or(dst_high, dst_high, scratch);
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}
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} else if (shift == 32) {
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mov(dst_low, zero_reg);
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@ -1497,33 +1497,33 @@ void TurboAssembler::ShlPair(Register dst_low, Register dst_high,
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void TurboAssembler::ShrPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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Register shift) {
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Register shift, Register scratch1,
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Register scratch2) {
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BlockTrampolinePoolScope block_trampoline_pool(this);
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Label done;
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Register kScratchReg = s3;
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Register kScratchReg2 = s4;
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And(shift, shift, 0x3F);
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srlv(dst_high, src_high, shift);
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Nor(kScratchReg2, zero_reg, shift);
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sll(kScratchReg, src_high, 1);
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sllv(kScratchReg, kScratchReg, kScratchReg2);
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srlv(dst_low, src_low, shift);
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Or(dst_low, dst_low, kScratchReg);
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And(kScratchReg, shift, 32);
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Register scratch3 = t8;
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And(scratch3, shift, 0x3F);
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srlv(dst_high, src_high, scratch3);
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Nor(scratch2, zero_reg, scratch3);
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sll(scratch1, src_high, 1);
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sllv(scratch1, scratch1, scratch2);
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srlv(dst_low, src_low, scratch3);
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Or(dst_low, dst_low, scratch1);
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And(scratch1, scratch3, 32);
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if (IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r6)) {
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Branch(&done, eq, kScratchReg, Operand(zero_reg));
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Branch(&done, eq, scratch1, Operand(zero_reg));
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mov(dst_low, dst_high);
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mov(dst_high, zero_reg);
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} else {
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movn(dst_low, dst_high, kScratchReg);
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movn(dst_high, zero_reg, kScratchReg);
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movn(dst_low, dst_high, scratch1);
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movn(dst_high, zero_reg, scratch1);
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}
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bind(&done);
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}
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void TurboAssembler::ShrPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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uint32_t shift) {
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Register kScratchReg = s3;
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uint32_t shift, Register scratch) {
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shift = shift & 0x3F;
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if (shift == 0) {
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mov(dst_low, src_low);
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@ -1537,8 +1537,8 @@ void TurboAssembler::ShrPair(Register dst_low, Register dst_high,
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srl(dst_high, src_high, shift);
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srl(dst_low, src_low, shift);
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shift = 32 - shift;
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sll(kScratchReg, src_high, shift);
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Or(dst_low, dst_low, kScratchReg);
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sll(scratch, src_high, shift);
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Or(dst_low, dst_low, scratch);
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}
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} else if (shift == 32) {
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mov(dst_high, zero_reg);
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@ -1552,19 +1552,20 @@ void TurboAssembler::ShrPair(Register dst_low, Register dst_high,
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void TurboAssembler::SarPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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Register shift) {
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Register shift, Register scratch1,
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Register scratch2) {
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BlockTrampolinePoolScope block_trampoline_pool(this);
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Label done;
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Register kScratchReg = s3;
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Register kScratchReg2 = s4;
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And(shift, shift, 0x3F);
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srav(dst_high, src_high, shift);
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Nor(kScratchReg2, zero_reg, shift);
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sll(kScratchReg, src_high, 1);
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sllv(kScratchReg, kScratchReg, kScratchReg2);
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srlv(dst_low, src_low, shift);
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Or(dst_low, dst_low, kScratchReg);
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And(kScratchReg, shift, 32);
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Branch(&done, eq, kScratchReg, Operand(zero_reg));
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Register scratch3 = t8;
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And(scratch3, shift, 0x3F);
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srav(dst_high, src_high, scratch3);
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Nor(scratch2, zero_reg, scratch3);
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sll(scratch1, src_high, 1);
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sllv(scratch1, scratch1, scratch2);
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srlv(dst_low, src_low, scratch3);
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Or(dst_low, dst_low, scratch1);
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And(scratch1, scratch3, 32);
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Branch(&done, eq, scratch1, Operand(zero_reg));
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mov(dst_low, dst_high);
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sra(dst_high, dst_high, 31);
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bind(&done);
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@ -1572,8 +1573,7 @@ void TurboAssembler::SarPair(Register dst_low, Register dst_high,
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void TurboAssembler::SarPair(Register dst_low, Register dst_high,
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Register src_low, Register src_high,
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uint32_t shift) {
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Register kScratchReg = s3;
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uint32_t shift, Register scratch) {
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shift = shift & 0x3F;
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if (shift == 0) {
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mov(dst_low, src_low);
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@ -1587,8 +1587,8 @@ void TurboAssembler::SarPair(Register dst_low, Register dst_high,
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sra(dst_high, src_high, shift);
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srl(dst_low, src_low, shift);
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shift = 32 - shift;
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sll(kScratchReg, src_high, shift);
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Or(dst_low, dst_low, kScratchReg);
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sll(scratch, src_high, shift);
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Or(dst_low, dst_low, scratch);
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}
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} else if (shift == 32) {
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sra(dst_high, src_high, 31);
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@ -2629,7 +2629,7 @@ void MacroAssembler::EmitFPUTruncate(FPURoundingMode rounding_mode,
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void TurboAssembler::TryInlineTruncateDoubleToI(Register result,
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DoubleRegister double_input,
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Label* done) {
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DoubleRegister single_scratch = kLithiumScratchDouble.low();
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DoubleRegister single_scratch = kScratchDoubleReg.low();
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UseScratchRegisterScope temps(this);
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Register scratch = temps.Acquire();
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Register scratch2 = t9;
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@ -584,22 +584,25 @@ class TurboAssembler : public Assembler {
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Register left_high, Register right_low, Register right_high);
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void ShlPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register shift);
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Register src_high, Register shift, Register scratch1,
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Register scratch2);
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void ShlPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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Register src_high, uint32_t shift, Register scratch);
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void ShrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register shift);
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Register src_high, Register shift, Register scratch1,
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Register scratch2);
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void ShrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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Register src_high, uint32_t shift, Register scratch);
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void SarPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register shift);
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Register src_high, Register shift, Register scratch1,
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Register scratch2);
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void SarPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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Register src_high, uint32_t shift, Register scratch);
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// MIPS32 R2 instruction macro.
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void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
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@ -325,9 +325,9 @@ const Simd128Register no_msareg = Simd128Register::no_reg();
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// cp is assumed to be a callee saved register.
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constexpr Register kRootRegister = s6;
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constexpr Register cp = s7;
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constexpr Register kLithiumScratchReg = s3;
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constexpr Register kLithiumScratchReg2 = s4;
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constexpr DoubleRegister kLithiumScratchDouble = f30;
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constexpr Register kScratchReg = s3;
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constexpr Register kScratchReg2 = s4;
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constexpr DoubleRegister kScratchDoubleReg = f30;
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constexpr DoubleRegister kDoubleRegZero = f28;
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// Used on mips64r6 for compare operations.
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// We use the last non-callee saved odd register for N64 ABI
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@ -3145,7 +3145,7 @@ void MacroAssembler::EmitFPUTruncate(FPURoundingMode rounding_mode,
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void TurboAssembler::TryInlineTruncateDoubleToI(Register result,
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DoubleRegister double_input,
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Label* done) {
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DoubleRegister single_scratch = kLithiumScratchDouble.low();
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DoubleRegister single_scratch = kScratchDoubleReg.low();
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UseScratchRegisterScope temps(this);
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Register scratch = temps.Acquire();
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Register scratch2 = t9;
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@ -604,7 +604,7 @@ inline void Emit64BitShiftOperation(
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LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src,
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Register amount,
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void (TurboAssembler::*emit_shift)(Register, Register, Register, Register,
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Register),
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Register, Register, Register),
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LiftoffRegList pinned) {
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Label move, done;
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pinned.set(dst);
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@ -621,14 +621,14 @@ inline void Emit64BitShiftOperation(
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// Do the actual shift.
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(assm->*emit_shift)(tmp.low_gp(), tmp.high_gp(), src.low_gp(),
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src.high_gp(), amount);
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src.high_gp(), amount, kScratchReg, kScratchReg2);
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// Place result in destination register.
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assm->TurboAssembler::Move(dst.high_gp(), tmp.high_gp());
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assm->TurboAssembler::Move(dst.low_gp(), tmp.low_gp());
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} else {
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(assm->*emit_shift)(dst.low_gp(), dst.high_gp(), src.low_gp(),
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src.high_gp(), amount);
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src.high_gp(), amount, kScratchReg, kScratchReg2);
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}
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assm->TurboAssembler::Branch(&done);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user