From fea4ddaaa8072a4703c3baa08fde00aaf6af00e9 Mon Sep 17 00:00:00 2001 From: jyan Date: Wed, 20 Apr 2016 06:19:56 -0700 Subject: [PATCH] S390: [Atomics] Remove Atomics code stubs; use TF ops Port d412cfa26c18a6ef1f6c0e274ee51f3d834eab74 Original commit message: [Atomics] Remove Atomics code stubs; use TF ops Reland of (https://codereview.chromium.org/1891033002) This is a much cleaner solution, which won't require nearly as much architecture-specific code. Thanks bmeurer@! R=binji@chromium.org, joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com BUG=v8:4614 LOG=N Review URL: https://codereview.chromium.org/1897373003 Cr-Commit-Position: refs/heads/master@{#35657} --- src/compiler/s390/code-generator-s390.cc | 22 ++++++++++++++--- .../s390/instruction-selector-s390.cc | 24 +++++++++++++++++++ 2 files changed, 43 insertions(+), 3 deletions(-) diff --git a/src/compiler/s390/code-generator-s390.cc b/src/compiler/s390/code-generator-s390.cc index 3ebe082748..4837d38df0 100644 --- a/src/compiler/s390/code-generator-s390.cc +++ b/src/compiler/s390/code-generator-s390.cc @@ -67,8 +67,8 @@ class S390OperandConverter final : public InstructionOperandConverter { MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) { const size_t index = *first_index; - *mode = AddressingModeField::decode(instr_->opcode()); - switch (*mode) { + if (mode) *mode = AddressingModeField::decode(instr_->opcode()); + switch (AddressingModeField::decode(instr_->opcode())) { case kMode_None: break; case kMode_MRI: @@ -82,7 +82,8 @@ class S390OperandConverter final : public InstructionOperandConverter { return MemOperand(r0); } - MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) { + MemOperand MemoryOperand(AddressingMode* mode = NULL, + size_t first_index = 0) { return MemoryOperand(mode, &first_index); } @@ -1660,6 +1661,21 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { case kCheckedStoreFloat64: ASSEMBLE_CHECKED_STORE_DOUBLE(); break; + case kAtomicLoadInt8: + __ LoadB(i.OutputRegister(), i.MemoryOperand()); + break; + case kAtomicLoadUint8: + __ LoadlB(i.OutputRegister(), i.MemoryOperand()); + break; + case kAtomicLoadInt16: + __ LoadHalfWordP(i.OutputRegister(), i.MemoryOperand()); + break; + case kAtomicLoadUint16: + __ LoadLogicalHalfWordP(i.OutputRegister(), i.MemoryOperand()); + break; + case kAtomicLoadWord32: + __ Load(i.OutputRegister(), i.MemoryOperand()); + break; default: UNREACHABLE(); break; diff --git a/src/compiler/s390/instruction-selector-s390.cc b/src/compiler/s390/instruction-selector-s390.cc index 8a4af5e65c..e96b7e76c5 100644 --- a/src/compiler/s390/instruction-selector-s390.cc +++ b/src/compiler/s390/instruction-selector-s390.cc @@ -1750,6 +1750,30 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) { g.UseRegister(left), g.UseRegister(right)); } +void InstructionSelector::VisitAtomicLoad(Node* node) { + LoadRepresentation load_rep = LoadRepresentationOf(node->op()); + S390OperandGenerator g(this); + Node* base = node->InputAt(0); + Node* index = node->InputAt(1); + ArchOpcode opcode = kArchNop; + switch (load_rep.representation()) { + case MachineRepresentation::kWord8: + opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8; + break; + case MachineRepresentation::kWord16: + opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16; + break; + case MachineRepresentation::kWord32: + opcode = kAtomicLoadWord32; + break; + default: + UNREACHABLE(); + return; + } + Emit(opcode | AddressingModeField::encode(kMode_MRR), + g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index)); +} + // static MachineOperatorBuilder::Flags InstructionSelector::SupportedMachineOperatorFlags() {