Fix ARM build.

Review URL: http://codereview.chromium.org/5638003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5928 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
vegorov@chromium.org 2010-12-07 12:21:26 +00:00
parent e0d3f6afdf
commit ff0365c2fa

View File

@ -186,21 +186,10 @@ int OS::ActivationFrameAlignment() {
}
#ifdef V8_TARGET_ARCH_ARM
// 0xffff0fa0 is the hard coded address of a function provided by
// the kernel which implements a memory barrier. On older
// ARM architecture revisions (pre-v6) this may be implemented using
// a syscall. This address is stable, and in active use (hard coded)
// by at least glibc-2.7 and the Android C library.
typedef void (*LinuxKernelMemoryBarrierFunc)(void);
LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) =
(LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
#endif
void OS::ReleaseStore(volatile AtomicWord* ptr, AtomicWord value) {
#if defined(V8_TARGET_ARCH_ARM) && defined(__arm__)
// Only use on ARM hardware.
pLinuxKernelMemoryBarrier();
MemoryBarrier();
#else
__asm__ __volatile__("" : : : "memory");
// An x86 store acts as a release barrier.