AuroraMiddleware/v8
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221 Commits

Author SHA1 Message Date
bmeurer@chromium.org
3e188ace5c [turbofan] Add backend support for load/store float32 values. 
This is the bare minimum required to support typed arrays. Support for
working with float32 values will be added based on this.

TEST=compiler-unittests,cctest
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/500343002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23386 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-26 08:29:12 +00:00
bmeurer@chromium.org
66dd869980 [turbofan] Add backend support for signed loads. 
Also rename the arch opcodes to match their native counterparts.

TEST=compiler-unittests,cctest
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/505713002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23345 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-25 10:35:38 +00:00
yangguo@chromium.org
3a1c55590f Correctly forward-declare inline function headers in generic-node.h 
R=bmeurer@chromium.org, jarin@chromium.org

Review URL: https://codereview.chromium.org/488363003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23331 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-25 06:57:13 +00:00
bmeurer@chromium.org
37058c1413 [turbofan] Add TruncateFloat64ToInt32 machine operator. 
Fix ChangeLowering to use TruncateFloat64ToInt32.

TEST=cctest,compiler-unittests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/484103002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23214 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-20 04:01:00 +00:00
bmeurer@chromium.org
cf51230881 [turbofan] Add proper conversion operators for int32<->int64. 
This affects arm64 and x64. Note that we do not yet optimize
these conversions. Later we will add support for merging these
conversion operators into other operations during instruction
selection.

TEST=cctest,compiler-unittests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/487723002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23184 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-19 08:48:41 +00:00
bmeurer@chromium.org
e4db78e705 [arm] Recognize comparisons of shifts with zero. 
For example, recognize

  0 == r1 << r2

and generate a single

  MOVS rt, r1, lsl r2

instruction.

TEST=cctest,compiler-unittests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/478233002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-18 11:10:01 +00:00
titzer@chromium.org
9803a72417 Unify MachineType and RepType. 
MachineType now tracks both the representation and the value type of machine quantities and is used uniformly throughout TurboFan.

These types can now express uint8, int8, uint16, and int16, i.e. signed and unsigned smallish integers. Note that currently only uint8 and uint16 are implemented in the TF backends.

R=bmeurer@chromium.org, mstarzinger@chromium.org
BUG=

Review URL: https://codereview.chromium.org/470593002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23122 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-14 09:19:54 +00:00
bmeurer@chromium.org
ae7d781d8b [turbofan] Introduce WordRor machine operator. 
Move recognition of rotate-right operations to the
MachineOperatorReducer, so we don't need to repeat that in the
InstructionSelector for every backend.

TEST=base-unittests,compiler-unittests,cctests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/469213002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23121 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-14 09:07:58 +00:00
titzer@chromium.org
07ab6791a1 Add FOR_INT32_SHIFTS to value-helper.h 
R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/470533002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23100 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-13 10:30:00 +00:00
titzer@chromium.org
6fa2cee262 Move MachineRepresentation to machine-type.h and rename to MachineType in preparation for merging it with RepType. 
R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/456333002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23051 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-11 15:55:28 +00:00
bmeurer@chromium.org
35f0976895 [turbofan] Support for combining branches with <Operation>WithOverflow. 
Also unify the handling of binops in the InstructionSelector
backends.

TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/415403005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22800 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-04 08:18:37 +00:00
bmeurer@chromium.org
ba12ca16a2 [turbofan] Add support for Int32SubWithOverflow. 
TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/432373002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22791 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-01 12:18:20 +00:00
titzer@chromium.org
ee7f97c8a0 TF: Rename ConvertXToY machine operators to ChangeXToY. 
R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/435923002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22788 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-01 10:54:58 +00:00
bmeurer@chromium.org
6ccb8704f2 [turbofan] Add Int32AddWithOverflow machine operator. 
TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/436593002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22784 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-01 09:32:58 +00:00
bmeurer@chromium.org
f2ad69e6f3 Another fix for cctest/test-run-machops/RunLoadImmIndex. 
TBR=danno@chromium.org

Review URL: https://codereview.chromium.org/430203002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22759 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-31 14:08:08 +00:00
titzer@chromium.org
6144849576 TF: Fix windows build (implicit cast between double and int32_t). 
R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/431963002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22754 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-31 12:01:36 +00:00
titzer@chromium.org
d521ed2507 TF: Add ConvertFloat64ToUint32 and ConvertUint32ToFloat64 machine operators. 
R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/431473004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22752 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-31 11:45:22 +00:00
bmeurer@chromium.org
546e8a6287 Fix cctest/test-run-machops/RunLoadImmIndex 
TBR=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/436533002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22746 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-31 10:24:44 +00:00
bmeurer@chromium.org
0eecf982f9 [arm] Add support for ROR. Refactor operand2 handling. 
This was the last missing bit for full "flexible second operand" /
operand2 support on ARM.

TEST=cctest/test-instruction-selector-arm,cctest/test-run-machops
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/434553002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22732 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-31 07:44:29 +00:00
danno@chromium.org
252cb8ba6e Fix 64-bit VS2010 build 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/420033003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22722 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-30 16:21:36 +00:00
danno@chromium.org
a1383e2250 Land the Fan (disabled) 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/426233002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-30 13:54:45 +00:00