AuroraMiddleware/v8
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22 Commits

Author SHA1 Message Date
Jacob.Bramley@arm.com
647e6cf2ac ARM64: Remove the unused 'SmiAbs'. 
BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/572903003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23970 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-09-16 10:42:09 +00:00
rodolph.perfetta@arm.com
437fef5000 ARM64: Support arbitrary offset in load/store pair. 
TF calls can generate code exceeding the instruction range.

BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/440303004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22969 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-07 10:46:40 +00:00
bmeurer@chromium.org
d07a2eb806 Rename ASSERT* to DCHECK*. 
This way we don't clash with the ASSERT* macros
defined by GoogleTest, and we are one step closer
to being able to replace our homegrown base/ with
base/ from Chrome.

R=jochen@chromium.org, svenpanne@chromium.org

Review URL: https://codereview.chromium.org/430503007

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-04 11:34:54 +00:00
danno@chromium.org
a1383e2250 Land the Fan (disabled) 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/426233002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-30 13:54:45 +00:00
m.m.capewell@googlemail.com
91ba01532f ARM64: Reland faster immediate check 
Improve the code used to check for encodable logical immediates, fix some corner
cases associated with moving kWMinInt into W registers, and add tests.

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/364653003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-02 09:52:23 +00:00
yangguo@chromium.org
be35a9e768 Revert "ARM64: Faster immediate check and fix corner cases" 
This reverts r22120 due to build breakage of arm64.debug target.

TBR=m.m.capewell@googlemail.com

Review URL: https://codereview.chromium.org/361973002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22123 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-01 13:50:46 +00:00
m.m.capewell@googlemail.com
95a3627609 ARM64: Faster immediate check and fix corner cases 
Improve the code used to check for encodable logical immediates, fix some corner
cases associated with moving kWMinInt into W registers, and add tests.

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/341123003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22120 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-01 13:25:33 +00:00
jochen@chromium.org
a4506cd3f2 Move platform abstraction to base library 
Also split v8-core independent methods from checks.h to base/logging.h and
merge v8checks with the rest of checks.

The CPU::FlushICache method is moved to CpuFeatures::FlushICache

RoundUp and related methods are moved to base/macros.h

Remove all layering violations from src/libplatform

BUG=none
R=jkummerow@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/358363002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-30 13:25:46 +00:00
mstarzinger@chromium.org
fec6e62dfb Check alpha-sorting of includes during presubmit. 
R=rossberg@chromium.org

Review URL: https://codereview.chromium.org/333013002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21894 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-20 08:40:11 +00:00
jochen@chromium.org
56a486c322 Use full include paths everywhere 
- this avoids using relative include paths which are forbidden by the style guide
- makes the code more readable since it's clear which header is meant
- allows for starting to use checkdeps

BUG=none
R=jkummerow@chromium.org, danno@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/304153016

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-03 08:12:43 +00:00
rodolph.perfetta@arm.com
123608ab9b ARM64 simulator fix for EXTR 
Fixes extract when imms = 0 because a left shift of 64 is not valid.

R=rodolph.perfetta@arm.com, svenpanne@chromium.org

Review URL: https://codereview.chromium.org/286193004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21459 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-23 09:41:41 +00:00
m.m.capewell@googlemail.com
ce8dab82f7 ARM64: Fix native cctest 
CPUFeatures::Probe has been modified such that it can be called only once, but
the cctests make two calls in native builds: once in VM init, and once in each
test setup. This patch removes the call in the test setup.

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/285273003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21337 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-16 12:09:42 +00:00
Jacob.Bramley@arm.com
e876dab9ad ARM64: Fix and improve MacroAssembler::Printf. 
- W-sized values passed to Printf are now handled correctly by the
    simulator. In AAPCS64, int32_t and int64_t are passed in the same
    way, so this didn't affect non-simulator builds.
  - Since Printf now records the type and size of each argument, it is
    possible to mix argument types.
  - It is now possible to print the stack pointer. There is only one
    remaining restriction: The `csp` register cannot be printed unless
    it is the current stack pointer. This is because it is modified by
    BumpSystemStackPointer when the caller-saved registers are
    preserved.

BUG=
R=rmcilroy@chromium.org

Review URL: https://codereview.chromium.org/268353005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21272 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-12 15:44:21 +00:00
rmcilroy@chromium.org
2ba3716e4a Reland - Arm64: Ensure that csp is always aligned to 16 byte values even if jssp is not. 
Even although the Arm64 specification specifies that csp
only needs to be aligned to 16 bytes if it is dereferenced, some
implementations show poor performance.

Also makes the following change:
 - Enable CPU support for arm64 to enable probing of cpu implementer and cpu part.
 - Add ALWAYS_ALIGN_CSP CpuFeature for Arm64 and set it based on runtime probing of the cpu imp
 - Rename PrepareForPush and PrepareForPop to PushPreamble and PopPostamble and move PopPostabl

Original Review URL: https://codereview.chromium.org/264773004

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/271543004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21221 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-09 12:51:52 +00:00
Jacob.Bramley@arm.com
77d6bca46f ARM64: Use default-NaN mode to canonicalize NaNs. 
BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/255343004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21156 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-06 08:05:27 +00:00
ulan@chromium.org
39c4b3c18d Fix android_arm64 build after r21001. 
BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/253873010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21040 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-29 10:58:16 +00:00
yangguo@chromium.org
17b33fa1da Handlify code allocation. 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/235153003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20795 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-16 11:38:56 +00:00
alexandre.rames@arm.com
622ddd3495 ARM64: Introduce a version of ADR handling distant targets. 
This fixes an out-of-range label error for an ADR instruction in the
mozilla/data/js1_5/Regress/regress-280769-2.js test.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/222433002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20545 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-07 12:33:03 +00:00
alexandre.rames@arm.com
1f38f42ef1 ARM64: Fixes and more support for FRINT<X> instructions. 
Fix simulation and tests for the [-0.5, -0.0[ range for FRINTA and FRINTN, and
add support for FRINTM.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/223843002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20487 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-03 14:30:44 +00:00
baptiste.afsa@arm.com
688d07d11b ARM64: Prevent compilers to optimize away NaN negation in tests. 
BUG=v8:3226
R=ulan@chromium.org, jochen@chromium.org
LOG=N

Review URL: https://codereview.chromium.org/196173021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20213 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-24 17:43:56 +00:00
dcarney@chromium.org
493c6b3543 Do stack checks while pushing locals 
R=yangguo@chromium.org

BUG=

Review URL: https://codereview.chromium.org/207543003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20176 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-24 08:17:06 +00:00
jochen@chromium.org
2ce0bebba1 Rename A64 port to ARM64 port 
BUG=354405
R=ulan@chromium.org, rodolph.perfetta@arm.com
LOG=y

Review URL: https://codereview.chromium.org/207823003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-21 09:28:26 +00:00