ager@chromium.org
0e183035a2
ARM: Merging constants in simulator and assembler header files and other cleanup.
...
First stab at a general ARM cleanup patch. It merges ARM constants so that they can be used across simulator, assembler and disassembler, and tidies up some syntax and ambiguities.
BUG=none
TEST=none
Review URL: http://codereview.chromium.org/6274009
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6483 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-01-26 08:32:54 +00:00
erik.corry@gmail.com
8c767e02f9
ARM: Add support for the VFP mov literal instruction and mov
...
between single VFP registers. Math.pow implementation has
been updated with the new instructions. This is a commit
of http://codereview.chromium.org/2813046/show for Rodolph
Perfetta.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5037 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-07-08 12:38:02 +00:00
sgjesse@chromium.org
fd5a7b37a2
ARM: Fix disassembly of double registers
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Added a few disassembler tests for vadd, vsub, vmul and vdiv.
Review URL: http://codereview.chromium.org/2823036
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4986 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-30 08:46:19 +00:00
mark@chromium.org
e9b5d7855b
Allow build-time selection between ia32 and x86_64 in the GYP/Xcode Mac
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Chromium build.
v8.gyp no longer sets any V8_TARGET_ARCH_* macro on the Mac. Instead, the
proper V8_TARGET_ARCH_* macro will be set by src/globals.h in the same way as
the V8_HOST_ARCH_* macro when it detects that no target macro is currently
defined. The Mac build will attempt to compile all ia32 and x86_64 .cc files.
#ifdef guards in each of these target-specific source files prevent their
compilation when the associated target is not selected. For completeness,
these #ifdef guards are also provided for the arm and mips .cc files.
BUG=706
TEST=x86_64 Mac GYP/Xcode-based Chromium build (still depends on other changes)
Review URL: http://codereview.chromium.org/2133003
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4666 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-17 15:41:35 +00:00
vegorov@chromium.org
b7833cb5f1
Port of optimized ICs for external and pixel arrays from ia32 to ARM.
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Review URL: http://codereview.chromium.org/993002
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4228 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-23 13:38:04 +00:00
erik.corry@gmail.com
407816af39
Fix some style issues in the ARM code.
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Also move a function into the macro assembler.
Fix some *& placement errors that had accumulated.
Review URL: http://codereview.chromium.org/385069
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3293 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-12 13:55:21 +00:00
erik.corry@gmail.com
0d94d7c785
Add vfp support on ARM. Patch from John Jozwiak.
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Review URL: http://codereview.chromium.org/348019
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-12 13:04:02 +00:00
sgjesse@chromium.org
e6b926f19d
Set the svn:eol-style property on new file.
...
TBR=ager@chromium.org
Review URL: http://codereview.chromium.org/201059
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2849 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-09 07:57:12 +00:00
sgjesse@chromium.org
3546e91bbc
Refactor the register to name mapping in the ARM simulator.
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Review URL: http://codereview.chromium.org/195024
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2847 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-09 07:01:20 +00:00
