AuroraMiddleware/v8
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3 Commits

Author SHA1 Message Date
dusan.milosavljevic@imgtec.com
032ae8e876 MIPS: Fix instruction selection test expectations after r25120. 
TEST=unittests/InstructionSelectorCmpTest.Parameter,
     InstructionSelectorTest.Word32EqualWithZero
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/706633003

Cr-Commit-Position: refs/heads/master@{#25167}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25167 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-11-05 18:51:43 +00:00
bmeurer@chromium.org
b472d9a045 MIPS: Add OWNERS file for compiler unittests. 
BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/648413003

Patch from Paul Lind <paul.lind@imgtec.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24574 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-14 03:55:43 +00:00
paul.lind@imgtec.com
f9b39f29fb MIPS: Add turbofan support for mips32. 
BUG=
R=bmeurer@chromium.org, dusan.milosavljevic@imgtec.com

Review URL: https://codereview.chromium.org/601723002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24397 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-02 15:48:48 +00:00