Commit Graph

176 Commits

Author SHA1 Message Date
ahaas
6c44ab30fd [turbofan] Make Float32Neg and Float64Neg mandatory operators.
R=bmeurer@chromium.org

Review-Url: https://codereview.chromium.org/2215403002
Cr-Commit-Position: refs/heads/master@{#38399}
2016-08-05 18:52:05 +00:00
jyan
77c9cb8341 [compiler] [wasm] Introduce Word32/64ReverseBytes as TF Optional Opcode
This commit fixes wasm little-endian load issue on big-endian platform
by introducing reverse byte operation immediately after a load.

R=bmeurer@chromium.org, titzer@chromium.org
BUG=

Review-Url: https://codereview.chromium.org/2045943002
Cr-Commit-Position: refs/heads/master@{#38183}
2016-07-29 19:33:28 +00:00
bmeurer
ba092fb09a [turbofan] Change Float64Max/Float64Min to JavaScript semantics.
So far we don't have a useful way to inline Math.max or Math.min in
TurboFan optimized code. This adds new operators NumberMax and NumberMin
and changes the Float64Max/Float64Min operators to have JavaScript
semantics instead of the C++ semantics that it had previously.

This also removes support for recognizing the tenary case in the
CommonOperatorReducer, since that doesn't seem to have any positive
impact (and actually doesn't show up in regular JavaScript, where
people use Math.max/Math.min instead).

Drive-by-fix: Also nuke the unused Float32Max/Float32Min operators.

R=jarin@chromium.org

Review-Url: https://codereview.chromium.org/2170343002
Cr-Commit-Position: refs/heads/master@{#37971}
2016-07-22 08:25:11 +00:00
mvstanton
8e18a5f2a0 [turbofan] Introduce integer multiplication with overflow.
BUG=

Review-Url: https://codereview.chromium.org/2101123005
Cr-Commit-Position: refs/heads/master@{#37748}
2016-07-14 08:56:14 +00:00
danno
3e2085eba4 [turbofan] Add MachineType to LinkageLocation
By adding MachineType to LinkageLocation, it is possible not only to reason
about the location of a LinkageLocation on the stack, but also about it's
size. This will be useful in follow-on CLs that attempt to merge some of the
parameter passing logic of tail calls and normal (non-tail) calls.

As a nice side-effect, it is no longer necessary to separately keep a
MachineSignature in a CallDescriptor, because the MachineTypes contianed in
LinkageLocation for all of the Descriptor's parameters and return types are
sufficient. This CL therefore removes the MachineSignature from the
CallDescriptor and adjusts all the calling code accordingly, simplifying and
de-duplicating code in a bunch of places.

R=titzer@chromium.org, bmeurer@chromium.org
LOG=N

Review-Url: https://codereview.chromium.org/2124023003
Cr-Commit-Position: refs/heads/master@{#37633}
2016-07-11 10:39:34 +00:00
bmeurer
0a0fe8fb8b [builtins] Unify most of the remaining Math builtins.
Import fdlibm versions of acos, acosh, asin and asinh, which are more
precise and produce the same result across platforms (we were using
libm versions for asin and acos so far, where both speed and precision
depended on the operating system so far). Introduce appropriate TurboFan
operators for these functions and use them both for inlining and for the
generic builtin.

Also migrate the Math.imul and Math.fround builtins to TurboFan builtins
to ensure that their behavior is always exactly the same as the inlined
TurboFan version (i.e. C++ truncation semantics for double to float
don't necessarily meet the JavaScript semantics).

For completeness, also migrate Math.sign, which can even get some nice
love in TurboFan.

Drive-by-fix: Some alpha-sorting on the Math related functions, and
cleanup the list of Math intrinsics that we have to export via the
native context currently.

BUG=v8:3266,v8:3496,v8:3509,v8:3952,v8:5169,v8:5170,v8:5171,v8:5172
TBR=rossberg@chromium.org
R=franzih@chromium.org

Review-Url: https://codereview.chromium.org/2116753002
Cr-Commit-Position: refs/heads/master@{#37476}
2016-07-01 11:13:02 +00:00
ahaas
de369129d2 [wasm] Detect unrepresentability in the float32-to-int32 conversion correctly on arm.
In the current implementation of wasm an unrepresentable input of the
float32-to-int32 conversion is detected by first truncating the input, then
converting the truncated input to int32 and back to float32, and then checking
whether the result is the same as the truncated input.

This input check does not work on arm and arm64 for an input of (INT32_MAX + 1)
because on these platforms the float32-to-int32 conversion results in INT32_MAX
if the input is greater than INT32_MAX.  When INT32_MAX is converted back to
float32, then the result is (INT32_MAX + 1) again because INT32_MAX cannot be
represented precisely as float32, and rounding-to-nearest results in (INT32_MAX
+ 1). Since (INT32_MAX + 1) equals the truncated input value, the input appears
to be representable.

With the changes in this CL, the result of the float32-to-int32 conversion is
incremented by 1 if the original result was INT32_MAX. Thereby the detection of
unrepresenable inputs in wasm works. Note that since INT32_MAX cannot be
represented precisely in float32, it can also never be a valid result of the
float32-to-int32 conversion.

@v8-mips-ports, can you do a similar implementation for mips?

R=titzer@chromium.org, Rodolph.Perfetta@arm.com

Review-Url: https://codereview.chromium.org/2105313002
Cr-Commit-Position: refs/heads/master@{#37448}
2016-06-30 14:30:44 +00:00
mvstanton
cede9ce5e1 [builtins] Unify Cosh, Sinh and Tanh as exports from flibm
BUG=v8:5086

Review-Url: https://codereview.chromium.org/2083573002
Cr-Commit-Position: refs/heads/master@{#37424}
2016-06-30 08:44:46 +00:00
bmeurer
c87168bc8c [builtins] Introduce proper Float64Tan operator.
Import base::ieee754::tan() from fdlibm and introduce Float64Tan TurboFan
operator based on that, similar to what we do for Float64Cos and Float64Sin.
Rewrite Math.tan() as TurboFan builtin and use those operators to also
inline Math.tan() into optimized TurboFan functions.

Drive-by-fix: Kill the %_ConstructDouble intrinsics, and provide only
the %ConstructDouble runtime entry for writing tests.

BUG=v8:5086,v8:5126
R=yangguo@chromium.org

Review-Url: https://codereview.chromium.org/2083453002
Cr-Commit-Position: refs/heads/master@{#37087}
2016-06-20 05:51:52 +00:00
bmeurer
c781e83194 [builtins] Introduce proper Float64Cos and Float64Sin.
Import base::ieee754::cos() and base::ieee754::sin() from fdlibm and
introduce Float64Cos and Float64Sin TurboFan operator based on that,
similar to what we do for Float64Log. Rewrite Math.cos() and Math.sin()
as TurboFan builtins and use those operators to also inline Math.cos()
and Math.sin() into optimized TurboFan functions.

CQ_INCLUDE_TRYBOTS=tryserver.chromium.linux:linux_chromium_rel_ng;tryserver.blink:linux_blink_rel
R=mvstanton@chromium.org
BUG=v8:5086,v8:5118

Review-Url: https://codereview.chromium.org/2073123002
Cr-Commit-Position: refs/heads/master@{#37072}
2016-06-17 15:24:15 +00:00
mvstanton
4d4eb61111 [builtins] Unify Atanh, Cbrt and Expm1 as exports from flibm.
BUG=v8:5103

Review-Url: https://codereview.chromium.org/2068743002
Cr-Commit-Position: refs/heads/master@{#37058}
2016-06-17 09:14:38 +00:00
bmeurer
d5f2ac5e33 [builtins] Introduce proper Float64Exp operator.
Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp
TurboFan operator based on that, similar to what we do for Float64Log.
Rewrite Math.exp() as TurboFan builtin and use that operator to also
inline Math.exp() into optimized TurboFan functions.

CQ_INCLUDE_TRYBOTS=tryserver.chromium.linux:linux_chromium_rel_ng;tryserver.blink:linux_blink_rel
BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108,chromium:620786
R=mvstanton@chromium.org

Committed: https://crrev.com/93e26314afc9da9b5b8bd998688262444ed73260
Review-Url: https://codereview.chromium.org/2077533002
Cr-Original-Commit-Position: refs/heads/master@{#37037}
Cr-Commit-Position: refs/heads/master@{#37047}
2016-06-17 05:20:59 +00:00
machenbach
789b0ad77a Revert of [builtins] Introduce proper Float64Exp operator. (patchset #5 id:80001 of https://codereview.chromium.org/2077533002/ )
Reason for revert:
[Sheriff] Leads to some different rounding as it seems in some audio layout tests. Please rebase upstream first if intended:
https://build.chromium.org/p/client.v8.fyi/builders/V8-Blink%20Linux%2064/builds/7508

Original issue's description:
> [builtins] Introduce proper Float64Exp operator.
>
> Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp
> TurboFan operator based on that, similar to what we do for Float64Log.
> Rewrite Math.exp() as TurboFan builtin and use that operator to also
> inline Math.exp() into optimized TurboFan functions.
>
> BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108
> R=mvstanton@chromium.org
>
> Committed: https://crrev.com/93e26314afc9da9b5b8bd998688262444ed73260
> Cr-Commit-Position: refs/heads/master@{#37037}

TBR=mvstanton@chromium.org,ahaas@chromium.org,bmeurer@chromium.org
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108

Review-Url: https://codereview.chromium.org/2070813002
Cr-Commit-Position: refs/heads/master@{#37039}
2016-06-16 12:49:53 +00:00
bmeurer
93e26314af [builtins] Introduce proper Float64Exp operator.
Import base::ieee754::exp() from FreeBSD msun and introduce a Float64Exp
TurboFan operator based on that, similar to what we do for Float64Log.
Rewrite Math.exp() as TurboFan builtin and use that operator to also
inline Math.exp() into optimized TurboFan functions.

BUG=v8:3266,v8:3468,v8:3493,v8:5086,v8:5108
R=mvstanton@chromium.org

Review-Url: https://codereview.chromium.org/2077533002
Cr-Commit-Position: refs/heads/master@{#37037}
2016-06-16 12:10:27 +00:00
mvstanton
d9bf520a22 [builtins] Introduce proper Float64Log2 and Float64Log10 operators.
BUG=v8:5095

Review-Url: https://codereview.chromium.org/2063693002
Cr-Commit-Position: refs/heads/master@{#37035}
2016-06-16 11:25:06 +00:00
bmeurer
89d8c57b9c [builtins] Introduce proper Float64Atan and Float64Atan2 operators.
Import base::ieee754::atan() and base::ieee754::atan2() from fdlibm and
introduce Float64Atan and Float64Atan2 TurboFan operators based on those,
similar to what we already did for Float64Log and Float64Log1p. Rewrite
Math.atan() and Math.atan2() as TurboFan builtin and use the operators
to also inline Math.atan() and Math.atan2() into optimized TurboFan functions.

R=yangguo@chromium.org
BUG=v8:5086,v8:5095

Review-Url: https://codereview.chromium.org/2065503002
Cr-Commit-Position: refs/heads/master@{#36916}
2016-06-13 07:08:17 +00:00
bmeurer
7ceed92ac0 [builtins] Introduce proper Float64Log1p operator.
Import base::ieee754::log1p() from fdlibm and introduce a Float64Log1p
TurboFan operator based on that, similar to what we do for Float64Log.
Rewrite Math.log1p() as TurboFan builtin and use that operator to also
inline Math.log1p() into optimized TurboFan functions.

Also unify the handling of the special IEEE 754 functions somewhat in
the TurboFan backends. At some point we can hopefully express this
completely in the InstructionSelector (once we have an idea what to do
with the ST(0) return issue on IA-32/X87).

Drive-by-fix: Add some more test coverage for the log function.

R=yangguo@chromium.org
BUG=v8:5086,v8:5092

Review-Url: https://codereview.chromium.org/2060743002
Cr-Commit-Position: refs/heads/master@{#36914}
2016-06-13 05:48:02 +00:00
bmeurer
d0c7775d7c [builtins] Introduce proper base::ieee754::log.
This switches Math.log to use an fdlibm based version of log, imported
as base::ieee754::log, and use that consistently everywhere, i.e. change
the Float64Log TurboFan operators on Intel to use the C++ implementation
as well (same for Crankshaft).

R=yangguo@chromium.org
BUG=v8:5065,v8:5086

Review-Url: https://codereview.chromium.org/2053893003
Cr-Commit-Position: refs/heads/master@{#36880}
2016-06-10 05:54:12 +00:00
bmeurer
f2da19fe39 [builtins] Migrate Math.log to TurboFan.
Introduce a dedicated Float64Log machine operator, that is either
implemented by a direct C call or by platform specific code, i.e.
using the FPU on x64 and ia32.

This operator is used to implement Math.log as a proper TurboFan
builtin on top of the CodeStubAssembler.

Also introduce a NumberLog simplified operator on top of Float64Log
and use that for the fast inline path of Math.log inside TurboFan
optimized code.

BUG=v8:5065

Review-Url: https://codereview.chromium.org/2029413005
Cr-Commit-Position: refs/heads/master@{#36703}
2016-06-03 09:48:25 +00:00
georgia.kouveli
612bad1d22 [arm] [arm64] Add optional operators Float32Neg and Float64Neg.
Adding optional operators for FNeg for WebAssembly, as the current implementation was significantly suboptimal for ARM.

Review-Url: https://codereview.chromium.org/2011303002
Cr-Commit-Position: refs/heads/master@{#36544}
2016-05-27 11:22:07 +00:00
ahaas
97c357aac1 [x64] Regression test for https://codereview.chromium.org/1877133004
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/1919263002

Cr-Commit-Position: refs/heads/master@{#35807}
2016-04-27 07:01:45 +00:00
bmeurer
0231a7efa2 [turbofan] Introduce TruncateTaggedToWord32 simplified operator.
This allows us to get rid of the "push TruncateFloat64ToInt32 into Phi"
trick that was used in the MachineOperatorReducer to combine the
ChangeTaggedToFloat64 and TruncateFloat64ToInt32 operations. Instead of
doing that later, we can just introduce the proper operator during the
representation selection directly.

Also separate the TruncateFloat64ToInt32 machine operator, which had two
different meanings depending on a flag (either JavaScript truncation or
C++ style round to zero). Now there's a TruncateFloat64ToWord32 which
represents the JavaScript truncation (implemented via TruncateDoubleToI
macro + code stub) and the RoundFloat64ToInt32, which implements the C++
round towards zero operation (in the same style as the other WebAssembly
driven Round* machine operators).

R=jarin@chromium.org

Review URL: https://codereview.chromium.org/1919513002

Cr-Commit-Position: refs/heads/master@{#35743}
2016-04-24 11:41:20 +00:00
zhengxing.li
d5ffbfefd9 X87: Change the test case for X87 RunTruncateFloat32ToUint32.
The CL #35651 (https://codereview.chromium.org/1858323003) exposed one hiden issue in RunTruncateFloat32ToUint32 test cases and X87 failed at it.

  Here is the issue in RunTruncateFloat32ToUint32:
  For float input = static_cast<float>(*i), the x87 GCC would optimize the input viariable in float floating register for release build.

  The problem is:
  SSE float register has single precision rounding semantic While X87 register hasn't when directly use floating register value. It will cause the value of input viariable has
  different precision for IA32 and X87 port. So static_cast<uint32_t>(input) will be different for IA32 and X87 port too.
  This led to CHECK_EQ(static_cast<uint32_t>(input), m.Call(input)) fail although V8 turbofan JITTed code m.Call(input) has exactly same result in both X87 and IA32 port.

  So we add the following sentence to do type cast to keep the single precision for RunTruncateFloat32ToUint32 by forcing the input viariable get value from memory insread of
  floating register.
  Such as: volatile float input = static_cast<float>(*i).

BUG=

Review URL: https://codereview.chromium.org/1905883002

Cr-Commit-Position: refs/heads/master@{#35689}
2016-04-21 09:12:11 +00:00
titzer
b994ad45b0 [turbofan] Length and index2 are unsigned in CheckedLoad/CheckedStore.
Also factor out test cases from test-run-machops.cc into test-run-load-store.cc

BUG=chromium:599717
LOG=Y

Review URL: https://codereview.chromium.org/1858323003

Cr-Commit-Position: refs/heads/master@{#35651}
2016-04-20 09:35:06 +00:00
ahaas
f7aa8cc70e [x64] Load int32 constants with movl instead of movq to avoid sign extension.
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1867293002

Cr-Commit-Position: refs/heads/master@{#35352}
2016-04-08 11:46:44 +00:00
balazs.kilvady
65eb0f6b33 MIPS: [turbofan] Add AddInt + WordShl tests to machops cctest file.
AddInt + WordShl cases can be optimized on MIPS and this CL contains
tests for those special cases. These test also must be passed on other
architectures.

BUG=

Review URL: https://codereview.chromium.org/1867923002

Cr-Commit-Position: refs/heads/master@{#35349}
2016-04-08 09:57:01 +00:00
marija.antic
4b86e6e321 MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub.
Implementation of turbofan operators Word32PairShl, Word32PairShr,
Word32PairSar, Int32AddPair and Int32SubPair for MIPS.

Port of:
https://codereview.chromium.org/1765973002/
https://codereview.chromium.org/1778893004/
https://codereview.chromium.org/1778493004/
https://codereview.chromium.org/1778893005/
https://codereview.chromium.org/1842013002/

Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc.

BUG=

Review URL: https://codereview.chromium.org/1819383002

Cr-Commit-Position: refs/heads/master@{#35307}
2016-04-06 14:45:30 +00:00
ahaas
40bdbef975 [wasm] Int64Lowering of Int64Mul on ia32 and arm.
Int64Mul is lowered to a new turbofan operator, Int32MulPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the multiplication.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1807273002

Cr-Commit-Position: refs/heads/master@{#35131}
2016-03-30 10:40:06 +00:00
mbrandy
eb0a2324a1 PPC: [wasm] Int64Lowering of Int64Sub.
Port 33c08596e1

Original commit message:
    Int64Sub is lowered to a new turbofan operator, Int32SubPair. The new
    operator takes 4 inputs an generates 2 outputs. The inputs are the low
    word of the left input, high word of the left input, the low word of the
    right input, and high word of the right input. The ouputs are the low
    and high word of the result of the subtraction.

    The implementation is very similar to the implementation of Int64Add.

R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1812473002

Cr-Commit-Position: refs/heads/master@{#34821}
2016-03-16 15:26:25 +00:00
ahaas
33c08596e1 [wasm] Int64Lowering of Int64Sub on ia32 and arm.
Int64Sub is lowered to a new turbofan operator, Int32SubPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the subtraction.

The implementation is very similar to the implementation of Int64Add.

@v8-arm-ports: please take a careful look at the implementation of sbc
in the simulator.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1778893005

Cr-Commit-Position: refs/heads/master@{#34808}
2016-03-16 10:58:05 +00:00
ahaas
3a2cc90cb4 [wasm] Turn off tests for mips and x87.
The tests require the implementation of Int32PairAdd and Word32PairShl.

R=titzer@chromium.org, v8-mips-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1804913002

Cr-Commit-Position: refs/heads/master@{#34782}
2016-03-15 11:04:47 +00:00
ahaas
2ddfe43a44 [wasm] Fixed register allocation for Word32PairShl on arm.
The previous register allocation allowed invalid register aliasing in
cases where in the TF graph the node was used for multiple inputs of the
Word32PairShl node.

Additionally I renamed PairLsl to LslPair in the code generation for
consistency.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1776393004

Cr-Commit-Position: refs/heads/master@{#34755}
2016-03-14 17:24:10 +00:00
ahaas
1b23079936 [wasm] Int64Lowering of Int64Add on ia32 and arm.
Int64Add is lowered to a new turbofan operator, Int32AddPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the addition.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1778493004

Cr-Commit-Position: refs/heads/master@{#34747}
2016-03-14 15:34:19 +00:00
ahaas
a5d4188849 x87: fix the use of CheckFloatEq and CheckDoubleEq in test.
Instead of using CheckFloatEq and CheckDoubleEq directly, I introduced
a macro which first stores the expected result in a volatile variable.

Here are some comments of previous CLs:

The reason is same as the CL #31808 (issue 1430943002, X87: Change the test case for X87 float operations), please refer: https://codereview.chromium.org/1430943002/.

  Here is the key comments from CL #31808
  Some new test cases use CheckFloatEq(...) and CheckDoubleEq(...) function for result check. When GCC compiling the CheckFloatEq() and CheckDoubleEq() function,
  those inlined functions has different behavior comparing with GCC ia32 build and x87 build.
  The major difference is sse float register still has single precision rounding semantic. While X87 register has no such rounding precsion semantic when directly use register value.
  The V8 turbofan JITTed has exactly same result in both X87 and IA32 port.

  So we add the following sentence to do type cast to keep the same precision for RunCallInt64ToFloat32/RunCallInt64ToFloat64. Such as: volatile double expect = static_cast<float>(*i).

R=titzer@chromium.org, weiliang.lin@intel.com

Review URL: https://codereview.chromium.org/1773513002

Cr-Commit-Position: refs/heads/master@{#34534}
2016-03-07 12:30:23 +00:00
ahaas
b1e345905a [wasm] Int64Lowering of FXXXConvertI64 instructions.
On 32-bit systems FXXXConvertI64 instructions are compiled to calls to
C functions. The TF node for the function call is already generated in
the wasm compiler, the lowering of the I64 parameter is done in the
Int64Lowering.

R=titzer@chromium.org, yangguo@chromium.org

Review URL: https://codereview.chromium.org/1738623003

Cr-Commit-Position: refs/heads/master@{#34487}
2016-03-04 09:51:49 +00:00
ahaas
2d090b11d0 [wasm] Removed dead code.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1760613002

Cr-Commit-Position: refs/heads/master@{#34442}
2016-03-02 18:00:25 +00:00
zhengxing.li
2cd9485644 X87: Change the test case for X87 RunRoundUint32ToFloat32.
The CL #33796 (https://codereview.chromium.org/1628133002) added the RunRoundUint32ToFloat32 test case and X87 failed at it.

  The reason is same as the CL #33630 (Issue 1649323002: X87: Change the test case for X87 RunRoundInt32ToFloat32), please refer: https://codereview.chromium.org/1649323002.

  Here is the key comments from CL #33630:
  Some new test cases use CheckFloatEq(...) and CheckDoubleEq(...) function for result check. When GCC compiling the CheckFloatEq() and CheckDoubleEq() function,
  those inlined functions has different behavior comparing with GCC ia32 build and x87 build.
  The major difference is sse float register still has single precision rounding semantic. While X87 register has no such rounding precsion semantic when directly use register value.
  The V8 turbofan JITTed has exactly same result in both X87 and IA32 port.

  For CHECK_EQ(a, b) function, if a and b are doubles, it will has similar behaviors like CheckFloatEq(...) and CheckDoubleEq(...) function when compiled by GCC and causes the test case
  fail.

  So we add the following sentence to do type case to keep the same precision for RunRoundUint32ToFloat32. Such as: volatile double expect = static_cast<float>(*i).

BUG=

Review URL: https://codereview.chromium.org/1714413002

Cr-Commit-Position: refs/heads/master@{#34202}
2016-02-23 01:50:37 +00:00
rodolph.perfetta
0dfd7bcdaf Added a ReverseBits operator and used it to implement Ctz.
Let me know if this is not the right approach

Review URL: https://codereview.chromium.org/1698483002

Cr-Commit-Position: refs/heads/master@{#34028}
2016-02-16 11:14:28 +00:00
danno
fd8fd05cc5 [turbofan] Add an operator to access the parent frame pointer
This functionality is useful for stubs that need to walk the stack. The new
machine operator, LoadParentFramePointer dosn't force the currently compiling
method to have a frame in contrast to LoadFramePointer. Instead, it adapts
accordingly when frame elision is possible, making efficient stack walks
possible without incurring a performance penalty for small stubs that can
benefit from frame elision.

R=bmeurer@chromium.org
LOG=N

Review URL: https://codereview.chromium.org/1695313002

Cr-Commit-Position: refs/heads/master@{#34014}
2016-02-16 07:29:16 +00:00
titzer
f92a563173 [test] Add test for RunLoadImmIndex<float> and RunLoadImmIndex<double>.
R=jarin@chromium.org
BUG=

Review URL: https://codereview.chromium.org/1694183002

Cr-Commit-Position: refs/heads/master@{#33987}
2016-02-15 11:04:01 +00:00
jing.bao
2166bd8ce5 [turbofan] Add TruncateFloat32ToUint32 operator to Turbofan.
BUG=

Review URL: https://codereview.chromium.org/1627263002

Cr-Commit-Position: refs/heads/master@{#33797}
2016-02-06 18:09:35 +00:00
jing.bao
187b3f2845 [turbofan] Add RoundUint32ToFloat32 operator to Turbofan.
BUG=

Review URL: https://codereview.chromium.org/1628133002

Cr-Commit-Position: refs/heads/master@{#33796}
2016-02-06 18:08:09 +00:00
ahaas
23943d0e00 [wasm] Provide backoff implementations for the Fxx rounding instructions
If the architecture does not provide rounding instructions, then C
implementations of these rounding instructions are called. The C
implementations from math.h are used, function pointers are registered
as external references so that they can be call from the simulator.

R=titzer@chromium.org

BUG=575379

LOG=Y

Review URL: https://codereview.chromium.org/1661463002

Cr-Commit-Position: refs/heads/master@{#33677}
2016-02-02 12:26:58 +00:00
ahaas
3f4163cd24 [wasm] Backoff implementation for F64Trunc using std::trunc.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1638283004

Cr-Commit-Position: refs/heads/master@{#33670}
2016-02-02 11:03:56 +00:00
zhengxing.li
587ad6fcc0 X87: Change the test case for X87 RunRoundInt32ToFloat32.
The CL #33347 (https://codereview.chromium.org/1589363002) added the RunRoundInt32ToFloat32 test case and X87 failed at it.

 The reason is same as the CL #31808 (issue 1430943002, X87: Change the test case for X87 float operations), please refer: https://codereview.chromium.org/1430943002/.

 Here is the key comments from CL #31808
 Some new test cases use CheckFloatEq(...) and CheckDoubleEq(...) function for result check. When GCC compiling the CheckFloatEq() and CheckDoubleEq() function,
 those inlined functions has different behavior comparing with GCC ia32 build and x87 build.
 The major difference is sse float register still has single precision rounding semantic. While X87 register has no such rounding precsion semantic when directly use register value.
 The V8 turbofan JITTed has exactly same result in both X87 and IA32 port.

 For CHECK_EQ(a, b) function, if a and b are doubles, it will has similar behaviors like CheckFloatEq(...) and CheckDoubleEq(...) function when compiled by GCC and causes the test case
 fail.

 So we add the following sentence to do type case to keep the same precision for RunRoundInt32ToFloat32. Such as: volatile double expect = static_cast<float>(*i).

BUG=

Review URL: https://codereview.chromium.org/1649323002

Cr-Commit-Position: refs/heads/master@{#33630}
2016-02-01 08:27:56 +00:00
ahaas
645880373b [turbofan] Add the StackSlot operator to turbofan.
The StackSlot operator allows to allocate a spill slot on the stack. We
are going to use this operator to pass floats through pointers to c
functions, which we need for floating point rounding in the case where
the architecture does not provide rounding instructions.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-ppc-ports@googlegroups.com, v8-mips-ports@googlegroups.com

Committed: https://crrev.com/7a693437787090d62d937b862e29521debcc5223
Cr-Commit-Position: refs/heads/master@{#33600}

Review URL: https://codereview.chromium.org/1645653002

Cr-Commit-Position: refs/heads/master@{#33606}
2016-01-29 09:43:54 +00:00
ahaas
11f7c2e63c Revert of [turbofan] Add the StackSlot operator to turbofan. (patchset #4 id:60001 of https://codereview.chromium.org/1645653002/ )
Reason for revert:
problems on Mac64

Original issue's description:
> [turbofan] Add the StackSlot operator to turbofan.
>
> The StackSlot operator allows to allocate a spill slot on the stack. We
> are going to use this operator to pass floats through pointers to c
> functions, which we need for floating point rounding in the case where
> the architecture does not provide rounding instructions.
>
> R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-ppc-ports@googlegroups.com, v8-mips-ports@googlegroups.com
>
> Committed: https://crrev.com/7a693437787090d62d937b862e29521debcc5223
> Cr-Commit-Position: refs/heads/master@{#33600}

TBR=titzer@chromium.org,v8-arm-ports@googlegroups.com,v8-mips-ports@googlegroups.com,v8-ppc-ports@googlegroups.com
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true

Review URL: https://codereview.chromium.org/1644283002

Cr-Commit-Position: refs/heads/master@{#33601}
2016-01-29 08:19:06 +00:00
ahaas
7a69343778 [turbofan] Add the StackSlot operator to turbofan.
The StackSlot operator allows to allocate a spill slot on the stack. We
are going to use this operator to pass floats through pointers to c
functions, which we need for floating point rounding in the case where
the architecture does not provide rounding instructions.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-ppc-ports@googlegroups.com, v8-mips-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1645653002

Cr-Commit-Position: refs/heads/master@{#33600}
2016-01-29 08:08:22 +00:00
ahaas
e06f7d784e [turbofan] Add the RoundInt32ToFloat32 operator to turbofan.
The new operator converts an int32 input to float32. If the input cannot
be represented exactly in float32, the value is rounded using the
round-ties-even rounding mode (the default rounding mode).

I provide implementations of the new operator for x64, ia32, arm, arm64,
mips, mips64, ppc, and ppc64.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com, v8-ppc-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1589363002

Cr-Commit-Position: refs/heads/master@{#33347}
2016-01-16 13:12:16 +00:00
ahaas
fc53eed14b [turbofan] Add the TruncateFloat32ToInt32 operator to turbofan.
The new operator converts a float32 input to int32 through truncation.
I provide implementations of the new operator for x64, ia32, arm,
arm64, mips, mips64, and x87. @v8-ppc-ports, can you please take care
of the ppc implementation?

R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com, weiliang.lin@intel.com

Review URL: https://codereview.chromium.org/1583323004

Cr-Commit-Position: refs/heads/master@{#33346}
2016-01-16 11:41:31 +00:00