Port r14230 (76c22097)
Original commit message:
Native method invocation from the arm/simulator-arm.cc previously made
non-portable assumptions about calling conventions. This was okay for 32-bit
stack-based machines, where by-value structs are automatically materialized
on the stack, and where both int and double parameters could be passed on the
stack. However they are not okay for x86-64, which has an elaborate scheme
for passing parameters in registers.
This CL replaces the previous non-portable code paths with portable code,
using call-sites that accurately match the prototype of the callee.
BUG=
Review URL: https://codereview.chromium.org/13989008
Patch from Akos Palfi <palfia@homejinni.com>.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14239 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Highlights:
- assembler.h adds FPU definitions used for Crankshaft.
- Support optimization of mips call: jalr->jal
- includes changes to set_target_address_at(), support routines.
- Add 2nd use of Apply() to update target addresses.
- Minor debugging improvement in simulator.
BUG=
TEST=
Review URL: http://codereview.chromium.org/7888003
Patch from Paul Lind <plind44@gmail.com>.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9259 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
3 small fixes:
- Fix erroneous use of reg t6 in macro-assembler.
- Minor optimization to overflow-check macros.
- Fix un-init var use (typo) in simulator FPCall handling.
None of these affected test cases.
BUG=
TEST=
Review URL: http://codereview.chromium.org//7236025
Patch from Paul Lind <plind44@gmail.com>.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8418 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Removed some unnecessary shifts when reading FCSR error flags.
Fixed some FCSR-related bugs.
Fixed some un-related style issues.
With this commit, mips build is still broken. Two more commits to come.
BUG=
TEST=
Review URL: http://codereview.chromium.org/6993054
Patch from Paul Lind <plind44@gmail.com>.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8173 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
The already working watchpoint break mechanism has been extended to handle "stop" instructions, with text messages.
Explanation (also in constants-mips.h):
On MIPS Simulator breakpoints can have different codes:
- Breaks between 0 and kMaxWatchpointCode are treated as simple watchpoints, the simulator will run through them and print the registers.
- Breaks between kMaxWatchpointCode and kMaxStopCode are treated as stop() instructions (see Assembler::stop()).
- Breaks larger than kMaxStopCode are simple breaks, dropping you into the debugger.
The current values are 31 for kMaxWatchpointCode and 127 for kMaxStopCode.
From the user's point of view this works the same way as the ARM stop instruction except for the break code usage detailed above.
Ported commits: r5723 (3ba78d24)
BUG=
TEST=
Review URL: http://codereview.chromium.org//7062014
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8069 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Make mips-specifc changes for r7999, r8001, r8002.
Also bring in changes for older commits 7203, 7279, 7693, 7715, 7788.
Mips changes for 7715 (Arm: Support hardfloat in SCons build), and
7693 (Implement hardfloat calling convention in macro assembler and simulator)
resulted in changes to SConstruct.
BUG=
TEST=
Review URL: http://codereview.chromium.org//6966031
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Updated to include fixes to several mips arch-specific files, corresponding to recent changes in r7944, r7935, r7926, r7914, r7910, r7895, and parts of r7423, which had previously been missed for mips. Rebased on r7964.
The simulator changes were missed on r7893 for code-stubs-mips,
where the DirectCEntry stuff was added.
There are also a couple small changes to builtins-mips following
r7879 for the other architectures.
BUG=
TEST=
Review URL: http://codereview.chromium.org//7042031
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7977 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit adds current working versions of assembler, macro-assembler,
disassembler, and simulator.
All other mips arch files are replaced with stubbed-out versions that
will build.
Arch independent files are updated as needed to support building and
running mips.
The only test is cctest/test-assembler-mips, and this passes on the
simulator and on mips hardware.
TEST=none
BUG=none
Patch by Paul Lind from MIPS.
Review URL: http://codereview.chromium.org/6730029/
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Chromium build.
v8.gyp no longer sets any V8_TARGET_ARCH_* macro on the Mac. Instead, the
proper V8_TARGET_ARCH_* macro will be set by src/globals.h in the same way as
the V8_HOST_ARCH_* macro when it detects that no target macro is currently
defined. The Mac build will attempt to compile all ia32 and x86_64 .cc files.
#ifdef guards in each of these target-specific source files prevent their
compilation when the associated target is not selected. For completeness,
these #ifdef guards are also provided for the arm and mips .cc files.
BUG=706
TEST=x86_64 Mac GYP/Xcode-based Chromium build (still depends on other changes)
Review URL: http://codereview.chromium.org/2133003
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4666 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
